st10f272z2 STMicroelectronics, st10f272z2 Datasheet - Page 99

• Manufacturer Part Number: st10f272z2
• Description: 16-bit Mcu With 256 Kbyte Flash Memory And 20 Kbyte Ram
• Manufacturer: STMicroelectronics

ST10F272Z2
20.7
Figure 29. SW / WDT bidirectional RESET (EA=0) followed by a HW RESET
Reset circuitry
Internal reset circuitry is described in
resistor of 50 kΩ to 250 kΩ (The minimum reset time must be calculated using the lowest
value).
It also provides a programmable (BDRSTEN bit of SYSCON register) pull-down to output
internal reset state signal (synchronous reset, watchdog timer reset or software reset).
This bidirectional reset function is useful in applications where external devices require a
reset signal but cannot be connected to RSTOUT pin.
This is the case of an external memory running codes before EINIT (end of initialization)
instruction is executed. RSTOUT pin is pulled high only when EINIT is executed.
The RPD pin provides an internal weak pull-down resistor which discharges external
capacitor at a typical rate of 200 µA. If bit PWDCFG of SYSCON register is set, an internal
pull-up resistor is activated at the end of the reset sequence. This pull-up will charge any
capacitor connected on RPD pin.
The simplest way to reset the ST10F272Z2 is to insert a capacitor C1 between RSTIN pin
and V
RPD pin and V
50 kΩ to 250 kΩ (the minimum reset time must be determined by the lowest value). Select
C1 that produce a sufficient discharge time to permit the internal or external oscillator and /
or internal PLL and the on-chip voltage regulator to stabilize.
SS
RSTIN
P0[7:2]
RSTOUT
RSTF
(After Filter)
P0[15:13]
P0[12:8]
P0[1:0]
ALE
RST
, and a capacitor between RPD pin and V
DD
. The input RSTIN provides an internal pull-up device equalling a resistor of
≤ 500 ns
≥ 50 ns
Figure
not transparent
not transparent
not transparent
1024 TCL
transparent
32. The RSTIN pin provides an internal pull-up
SS
(C0) with a pull-up resistor R0 between
At this time RSTF is sampled LOW
so HW Reset is entered
not t.
not t.
≤ 500 ns
8 TCL
≥ 50 ns
System reset
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