st10f272z2 STMicroelectronics, st10f272z2 Datasheet - Page 179

• Manufacturer Part Number: st10f272z2
• Description: 16-bit Mcu With 256 Kbyte Flash Memory And 20 Kbyte Ram
• Manufacturer: STMicroelectronics

ST10F272Z2
Figure 61. CLKOUT and READY
1. Cycle as programmed, including MCTC wait states (Example shows 0 MCTC WS).
2. The leading edge of the respective command depends on RW-delay.
3. READY sampled HIGH at this sampling point generates a READY controlled wait state, READY sampled
4. READY may be deactivated in response to the trailing (rising) edge of the corresponding command (RD or
5. If the Asynchronous READY signal does not fulfill the indicated setup and hold times with respect to
6. Multiplexed bus modes have a MUX wait state added after a bus cycle, and an additional MTTC wait state
7. The next external bus cycle may start here.
LOW at this sampling point terminates the currently running bus cycle.
WR).
CLKOUT (e.g. because CLKOUT is not enabled), it must fulfill t
guaranteed, if READY is removed in response to the command (see Note 4).
may be inserted here.
For a multiplexed bus with MTTC wait state this delay is two CLKOUT cycles, for a demultiplexed bus
without MTTC wait state this delay is zero.
CLKOUT
ALE
RD, WR
Synchronous
READY
Asynchronous
READY
t
t
58
32
3)
t
t
t
59
30
34
Running cycle 1)
2)
t
t
33
31
t
t
35
58
3)
t
37
3)
t
t
36
59
t
5)
29
t
35
wait state
READY
3)
37
t
in order to be safely synchronized. This is
36
MUX / Tri-state 6)
t
60
Electrical characteristics
4)
6)
7)
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