st10f272z2 STMicroelectronics, st10f272z2 Datasheet - Page 38
st10f272z2
Manufacturer Part Number
st10f272z2
Description
16-bit Mcu With 256 Kbyte Flash Memory And 20 Kbyte Ram
Manufacturer
STMicroelectronics
Datasheet
1.ST10F272Z2.pdf
(189 pages)
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Internal Flash memory
5.5.3
5.5.4
38/189
Flash non-volatile access protection register 0
FNVAPR0 (0x08 DFB8)
Table 21.
Flash non-volatile access protection register 1 low
FNVAPR1L (0x08 DFBC)
Table 22.
PDS15 PDS14 PDS13 PDS12 PDS11 PDS10 PDS9 PDS8 PDS7 PDS6 PDS5 PDS4 PDS3 PDS2 PDS1 PDS0
ACCP
DBGP
PDS(15:0)
RW
15
15
Bit
Bit
RW
14
14
RW
13
13
Flash non-volatile access protection register 0
Flash non-volatile access protection register 1 low
Access Protection
This bit, if programmed at 0, disables any access (read/write) to data mapped
inside IFlash Module address space, unless the current instruction is fetched from
IFlash.
Debug Protection
This bit, if erased at 1, allows to by-pass all the protections using the Debug
features through the Test Interface. If programmed at 0, on the contrary, all the
debug features, the Test Interface and all the Flash Test Modes are disabled. Even
STMicroelectronics will not be able to access the device to run any eventual failure
analysis.
Protections Disable 15-0
If bit PDSx is programmed at 0 and bit PENx is erased at 1, the action of bit ACCP
is disabled. Bit PDS0 can be programmed at 0 only if both bits DBGP and ACCP
have already been programmed at 0. Bit PDSx can be programmed at 0 only if bit
PENx-1 has already been programmed at 0.
RW
12
12
RW
11
11
RW
10
10
RW
reserved
9
9
NVR
NVR
RW
8
8
RW
7
7
Function
Function
RW
6
6
RW
5
5
RW
4
4
RW
3
Delivery value:: FFFFh
3
Reset value: ACFFh
RW
2
2
ST10F272Z2
DBGP ACCP
RW
RW
1
1
RW
RW
0
0
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