isp1760 NXP Semiconductors, isp1760 Datasheet - Page 31

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isp1760

Manufacturer Part Number
isp1760
Description
Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Table 12:
[1]
9397 750 13257
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
USBCMD register: bit allocation
8.2.2 USBSTS register (R/W: 0024h)
LHCR
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Table 13:
[1]
The USB Status (USBSTS) register indicates pending interrupts and various states of the
Host Controller. The status resulting from a transaction on the serial bus is not indicated in
this register. Software clears the register bits by writing ones to them. The bit allocation is
given in
Bit
31 to 24
23 to 16
15 to 8
7
6 to 2
1
0
For details on register bit description, refer to Enhanced Host Controller Interface Specification for Universal
Serial Bus Rev. 1.0 .
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
Table
Symbol
-
ITC[7:0]
-
LHCR
-
HCRESET Host Controller Reset: This control bit is used by the software to reset
RS
USBCMD register: bit description
14.
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 8 November 2004
Description
reserved; write logic 0
Interrupt Threshold Control: This field is used by the system software to
select the maximum rate at which the Host Controller will issue interrupts.
reserved
Light Host Controller Reset (optional): If implemented, it allows the
driver software to reset the EHCI controller without affecting the state of
the ports or the relationship to the companion Host Controllers. If not
implemented, a read of this field will always return logic 0.
reserved
the Host Controller.
Run/Stop: 1 = Run, 0 = Stop. When set, the Host Controller executes the
schedule.
reserved
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
[1]
reserved
reserved
ITC[7:0]
[1]
[1]
[1]
R/W
R/W
R/W
R/W
27
19
11
0
1
0
3
0
Embedded Hi-Speed USB host controller
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
HCRESET
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
ISP1760
R/W
R/W
R/W
R/W
31 of 105
RS
24
16
0
0
8
0
0
0

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