FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 12
FWIXEPAD0SE001
Manufacturer Part Number
FWIXEPAD0SE001
Description
Advanced 8-Port 10/100 Mbps PHY Transceivers
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.FWIXEPAD0SE001.pdf
(226 pages)
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Contents
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Description
Added
Modified
Modified
Added note to
Parameters”
Parameters”.
Added table note to
Parameters”.
Added table note to
Parameters”.
Added table note to
Parameters”
Added software power-down and note to
Parameters”.
Modified paragraphs and added last paragraph under
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Modified
Added
Modified
Added
Modified table and figure under
Section 4.14, “Link Hold-Off
Table 100 “Cable Diagnostics Register (Address 29, Hex
Figure 102 “Intel® LXT9785MBC 196-Ball BGA15 Package Dimensions”
Table 52 “Intel® LXT9785/LXT9785E Operating Conditions”
Table 58 “Intel® LXT9785/LXT9785E 100BASE-FX Transceiver Characteristics”
Table 82 “Intel® LXT9785/LXT9785E Register
Table 83 “Control Register (Address
Table 84 “Status Register (Address
Table 85 “PHY Identification Register 1 (Address
Table 86 “PHY Identification Register 2 (Address 3)”
Table 87 “Auto-Negotiation Advertisement Register (Address 4)”
Table 88 “Auto-Negotiation Link Partner Base Page Ability Register (Address
Table 89 “Auto-Negotiation Expansion Register (Address
Table 90 “Auto-Negotiation Next Page Transmit Register (Address
Table 91 “Auto-Negotiation Link Partner Next Page Receive Register (Address
Table 92 “Port Configuration Register (Address 16, Hex
Table 93 “Quick Status Register (Address 17, Hex
Table 94 “Interrupt Enable Register (Address 18, Hex 12)”
Table 95 “Interrupt Status Register (Address 19, Hex 13)”
Table 96 “LED Configuration Register (Address 20, Hex 14)”
Table 97 “Receive Error Count Register (Address 21, Hex
Table 98 “RMII Out-of-Band Signaling Register (Address 25, Hex
Table 99 “Trim Enable Register (Address 27, Hex
Table 101 “Intel® LXT9785/LXT9785E Register Bit
through
Table 60 “Intel® LXT9785/LXT9785E SMII - 100BASE-TX Receive Timing
Table 60 “Intel® LXT9785/LXT9785E SMII - 100BASE-TX Receive Timing
Table 66 “Intel® LXT9785/LXT9785E SS-SMII - 100BASE-TX Receive Timing
Table 72 “Intel® LXT9785/LXT9785E RMII - 100BASE-TX Receive Timing
Table 77 “Intel® LXT9785/LXT9785E RMII - 10BASE-T Transmit Timing
Revision Date: August 28, 2003
Section 9.0, “Ordering
Revision Number: 007
Overview”.
Table 80 “Intel® LXT9785/LXT9785E Power-Up Timing
1)”.
0)”.
Section 7.0, “Register
Information”.
Set”.
2)”.
1B)”. (Register bit 27.6)
11)”. (Register bit 17.8)
Map”.
1D)”.
10)”. (Register bits 16.6, 16.4:3)
6)”.
15)”.
Revision Date: August 28, 2003
19)”.
7)”.
Document Number: 249241
Definitions”.
Revision Number: 007
5)”.
Datasheet
8)”.
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