FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 215

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FWIXEPAD0SE001

Manufacturer Part Number
FWIXEPAD0SE001
Description
Advanced 8-Port 10/100 Mbps PHY Transceivers
Manufacturer
INTEL [Intel Corporation]
Datasheet
Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
Table 99. Trim Enable Register (Address 27, Hex 1B) (Sheet 2 of 2)
Table 100. Cable Diagnostics Register (Address 29, Hex 1D) (Sheet 1 of 2)
1. LSHR = Default value is derived from a single device input pin state or a group of device input pin states as
2. Default values for Register bits 27.11:10 are determined by the TxSLEW pins.
3. Default value for Register bit 27.9 is determined by the AMDIX_EN pin.
4. Default value for Register bit 27.8 is determined by the MDIX pin. BGA15 does not support the MDIX
5. R/W = Read/Write, R = Read Only, LH = Latching High – cleared when read.
6.
1. R/W = Read/Write, R = Read only, LH = Latching High, cleared when read
2. Recommended default value.
Bit
1:0
the pin(s) are latched at startup or hardware reset.
hardware configuration. The BGA15 default = 0.
15:14
13:11
3
2
Bit
10
Name
SLP_Det
LFIT
Expired
Reserved
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Reserved
Start-Test
CD_EN
Name
Description
Standard Link Partner Detected.
0 = Standard link partner not discovered; process may not be
1 = Standard link partner discovered; indication not to turn on
Note: This bit is only valid while link is down.
Link Fail Inhibit Timer expiration indicator. Valid only
when SLP_Det = 1.
0 = Link Fail Inhibit Timer has not expired or standard link
1 = Link Fail Inhibit Timer expired with a standard link partner
Write as 0, ignore on Read.
complete.
power over the cable.
partner not discovered
detected since last register read or link establishment
Write as 01, ignore on read
000 = Do not perform cable fault test (Default)
101 = Perform long cable fault test only
110 = Perform short cable fault test only
Once Register bit 29.9 is set, the Start-Test
bits will clear when read.
Any other combination of the Register bit
settings are reserved and should not be used.
0 = Normal operation
1 = Enable cable diagnostic tests. Forces
link to drop.
Description
Type
R, LH
R, LH
Type
R/W
R/W
R/W
R
LH
5
1
Default
Default
000
00
01
0
0
0
217
2

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