FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 13

• Manufacturer Part Number: FWIXEPAD0SE001
• Description: Advanced 8-Port 10/100 Mbps PHY Transceivers
• Manufacturer: INTEL [Intel Corporation]

Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
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Description
Changed "pseudo-ECL (PECL)" to "Low Voltage Positive Emitter Coupled Logic (LVPECL)" in the
second paragraph, front page.
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sentence to RXER0 through RXER7 signal description.
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note to PREASEL signal description.
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(LVPECL)" in the first paragraph, second sentence.
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Changed "PECL" to "LVPECL in third paragraph, first sentence under
Network
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“synchronously.”
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Interface
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Circuitry”.
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2.5 V +/-
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3.3 V +/-
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Table 55 “Intel® LXT9785/LXT9785E Digital I/O DC Electrical Characteristics – SD
Operations”.
Table 5 “Intel® LXT9785/LXT9785E RMII Signal Descriptions –
Table 10 “Intel® LXT9785/LXT9785E Signal Detect –
Table 11 “Intel® LXT9785/LXT9785E Network Interface Signal Descriptions –
Table 13 “Intel® LXT9785/LXT9785E Miscellaneous Signal Descriptions –
Section 4.1,
Section 4.3.2, “Internal
Section 4.9.3.3, “Carrier Sense/Data Valid
Section 4.10.1, “Preamble
Section 4.12.3, “Out-of-Band
Table 52 “Intel® LXT9785/LXT9785E Operating
Table 53 “Intel® LXT9785/LXT9785E Digital I/O DC Electrical Characteristics (VCCIO =
Table 54 “Intel® LXT9785/LXT9785E Digital I/O DC Electrical Characteristics (VCCIO =
Table 58 “Intel® LXT9785/LXT9785E 100BASE-FX Transceiver
5%)”.
5%)”.
Figure 28 “Intel® LXT9785/LXT9785E Protocol
Circuitry”.
Figure 36 “Recommended Intel® LXT9785/LXT9785E-to-3.3 V Fiber Transceiver
Figure 37 “Recommended Intel® LXT9785/LXT9785E-to-5 V Fiber Transceiver Interface
Section 4.11.2, “Interaction between Processor, MAC, and
Section 4.2.1.3, “Fiber
Section 4.9.3.4, “Carrier Sense
Section 4.6.1.5, “Parallel
Section 4.7.4.3, “Receive
Revision Number: 006 (INTERNAL RELEASE)
Section 4.9.3.7, “Fiber PMD
Section 5.2.5, “The Fiber
“Introduction”. Changed "Pseudo-ECL (PECL)" to "Low Voltage PECL
Section 4.9.3.6.3, “Polarity
Section 4.11, “DTE Discovery
Revision Date: June 10, 2003
Section 4.6.1.4, “Link
Section 4.10.4,
Loopback”.
Handling”. Added text to last paragraph.
Signaling”. Added sentence to end of first paragraph.
Interface”.
Detection”. Added second paragraph.
“Jabber”.
Error”.
Interface”.
Sublayer”.
(SMII)”. Revised last sentence in first paragraph.
Criteria”.
(RMII)”. Changed “asynchronously to
Correction”.
Sublayers”.
Process”.
Conditions”.
PQFP”.
Section 4.9.1, “100BASE-X
PQFP”. Added last
Characteristics”.
PHY”.
PQFP”. Added
PQFP”,
Contents
Pins”.
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