FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 183

• Manufacturer Part Number: FWIXEPAD0SE001
• Description: Advanced 8-Port 10/100 Mbps PHY Transceivers
• Manufacturer: INTEL [Intel Corporation]

Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
Figure 46. Intel
Table 67. Intel
TxSYNC setup to TxCLK rising edge and
TxData setup to TxCLK rising edge
TxSYNC hold from TxCLK rising edge and
TxData hold to TxCLK rising edge
TxEN sampled to start of /J/
NOTE: The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
testing.
100BASE-TX or 100BASE-FX).
®
®
LXT9785/LXT9785E SS-SMII - 100BASE-TX Transmit Timing
LXT9785/LXT9785E SS-SMII - 100BASE-TX Transmit Timing
default configuration of 00 (32 bits of initial fill).
TxSYNC
TxData
TxCLK
TPFO
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Parameter
t
1
t
2
t
3
Sym
t1
t2
t3
Min
1.5
1.0
–
Typ
t
1
11
–
–
1
t
2
Max
18
–
–
Units
BT
ns
ns
2
Conditions
Test
–
–
–
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