MC9S08JM16CGTE FREESCALE [Freescale Semiconductor, Inc], MC9S08JM16CGTE Datasheet - Page 52

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MC9S08JM16CGTE

Manufacturer Part Number
MC9S08JM16CGTE
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Chapter 4 Memory
4.5.6
The block protection feature prevents the protected region of flash from program or erase changes. Block
protection is controlled through the flash protection register (FPROT). When enabled, block protection
begins at any 512 byte boundary below the last address of flash, 0xFFFF. (see
Protection Register (FPROT and
After exit from reset, FPROT is loaded with the contents of the NVPROT location which is in the
nonvolatile register block of the flash memory. FPROT cannot be changed directly from application
software so a runaway program cannot alter the block protection settings. Since NVPROT is within the
last 512 bytes of flash, if any amount of memory is protected, NVPROT is itself protected and cannot be
altered (intentionally or unintentionally) by the application software. FPROT can be written through
background debug commands which allows a way to erase and reprogram a protected flash memory.
The block protection mechanism is illustrated below. The FPS bits are used as the upper bits of the last
address of unprotected memory. This address is formed by concatenating FPS7:FPS1 with logic 1 bits as
shown. For example, in order to protect the last 8192 bytes of memory (address 0xE000 through 0xFFFF),
the FPS bits must be set to 1101 111 which results in the value 0xDFFF as the last address of unprotected
memory. In addition to programming the FPS bits to the appropriate value, FPDIS (bit 0 of NVPROT)
must be programmed to logic 0 to enable block protection. Therefore the value 0xDE must be programmed
into NVPROT to protect addresses 0xE000 through 0xFFFF.
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Writing a second time to a flash address before launching the previous command (there is only one
write to flash for every command)
Writing a second time to FCMD before launching the previous command (there is only one write
to FCMD for every command)
Writing to any flash control register other than FCMD after writing to a flash address
Writing any command code other than the five allowed codes (0x05, 0x20, 0x25, 0x40, or 0x41)
to FCMD
Accessing (read or write) any flash control register other than the write to FSTAT (to clear FCBEF
and launch the command) after writing the command to FCMD.
The MCU enters stop mode while a program or erase command is in progress (the command is
aborted)
Writing the byte program, burst program, or page erase command code (0x20, 0x25, or 0x40) with
a background debug command while the MCU is secured (the background debug controller can
only do blank check and mass erase commands when the MCU is secure)
Writing 0 to FCBEF to cancel a partial command
Flash Block Protection
FPS7 FPS6 FPS5 FPS4 FPS3 FPS2 FPS1
A15
A14
A13
Figure 4-4. Block Protection Mechanism
NVPROT).”)
A12
MC9S08JM16 Series Data Sheet, Rev. 2
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A10
A9
A8
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A7 A6 A5 A4 A3 A2 A1 A0
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Section 4.7.4, “Flash
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Freescale Semiconductor
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