MC9S08JM16CGTE FREESCALE [Freescale Semiconductor, Inc], MC9S08JM16CGTE Datasheet - Page 73

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MC9S08JM16CGTE

Manufacturer Part Number
MC9S08JM16CGTE
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
5.7.6
This read-only register is included, so host development systems can identify the HCS08 derivative and
revision number. This allows the development software to recognize where specific memory blocks,
registers, and control bits are located in a target MCU.
Freescale Semiconductor
Reserved
Reset
Reset
SPI2FE
ID[11:8]
ID[7:0]
Field
ACIC
Field
Field
7:4
3:0
7:0
1
0
W
W
R
R
System Device Identification Register (SDIDH, SDIDL)
SPI2 Ports Input Filter Enable
0 Disable input filter on SPI2 port pins to allow for higher maximum SPI baud rate.
1 Enable input filter on SPI2 port pins to eliminate noise and restrict maximum SPI baud rate
Analog Comparator to Input Capture Enable— This bit connects the output of ACMP to TPM input channel 0.
0 ACMP output not connected to TPM input channel 0.
1 ACMP output connected to TPM input channel 0.
Bits 7:4 are reserved. Reading these bits will result in an indeterminate value; writes have no effect.
Part Identification Number — Each derivative in the HCS08 family has a unique identification number. The
MC9S08JM16 series is hard coded to the value 0x01E. See also ID bits in
ID7
Part Identification Number — Each derivative in the HCS08 Family has a unique identification number. The
MC9S08JM16 series is hard coded to the value 0x01E. See also ID bits in
0
7
7
Figure 5-7. System Device Identification Register — High (SDIDH)
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 5-8. System Device Identification Register — Low (SDIDL)
Table 5-7. SOPT2 Register Field Descriptions (continued)
ID6
0
6
6
Table 5-8. SDIDH Register Field Descriptions
Table 5-9. SDIDL Register Field Descriptions
MC9S08JM16 Series Data Sheet, Rev. 2
ID5
0
5
5
ID4
1
4
4
Description
Description
Description
ID11
Chapter 5 Resets, Interrupts, and System Configuration
ID3
3
0
3
1
ID10
ID2
Table
Table
0
1
2
2
5-9.
5-8.
ID9
ID1
0
1
1
1
ID8
ID0
0
0
0
0
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