MC9S08JM16CGTE FREESCALE [Freescale Semiconductor, Inc], MC9S08JM16CGTE Datasheet - Page 88

• Manufacturer Part Number: MC9S08JM16CGTE
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 6 Parallel Input/Output
6.5.8
In addition to the I/O control, port D pins are controlled by the registers listed below.
PTDPE[7, 2:0]
PTDSE[7, 2:0]
88
Reset
Reset
7, 2:0
7, 2:0
Field
Field
W
W
R
R
PTDPE7
PTDSE7
Port D Pin Control Registers (PTDPE, PTDSE, PTDDS)
0
1
Output Slew Rate Control Enable for Port D Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTD pin. For port D pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port D bit n.
1 Output slew rate control enabled for port D bit n.
7
Internal Pullup Enable for Port D Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTD pin. For port D pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port D bit n.
1 Internal pullup device enabled for port D bit n.
7
Figure 6-20. Output Slew Rate Control Enable for Port D (PTDSE)
0
1
6
6
Figure 6-19. Internal Pullup Enable for Port D (PTDPE)
Table 6-18. PTDPE Register Field Descriptions
Table 6-19. PTDSE Register Field Descriptions
MC9S08JM16 Series Data Sheet, Rev. 2
0
1
5
5
0
1
4
4
Description
Description
3
0
3
1
PTDPE2
PTDSE2
0
1
2
2
PTDPE1
PTDSE1
Freescale Semiconductor
0
1
1
1
PTDPE0
PTDSE0
0
1
0
0