AX88780_07 ASIX [ASIX Electronics Corporation], AX88780_07 Datasheet - Page 23

• Manufacturer Part Number: AX88780_07
• Description: High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

4.11 TXDES3--TX Descriptor3 Register
Offset Address = 0xFC2C
Field
31:16
15
14:13
12:0
4.12 RX_CFG--RX Configuration Register
Offset Address = 0xFC30h
Field
31:9
8
7:5
4
3:1
0
4.13 RXCURT--RX Current Pointer Register
Offset Address = 0xFC34
Field
31:11
10:0
Name
RXCURPTR
Name
TXD3_EN
TXD3_LEN
Name
RXBME
RXCHKSUM
RXBUFPRO
-
-
-
-
-
-
Type
R
R/W
Type
R
R/W
R
R/W
Type
R
R/W
R/W
R/W
R/W
R/W
Default
All 0’s
All 0’s
Default
All 0’s
0
00
All 0’s
Default
All 0’s
1
000
0
000
1
Default = 0x0000_0000
Default = 0x0000_0000
Reserved
RX Line Current Pointer.
Point to the last line that will be written by hardware. The unit of line is 16
bytes. MAC will maintain this register.
Transmit TX descriptor 3
Reserved
If this bit is enabled, MAC will begin to transmit data that are stored in TX
buffer. In former, data had been written to TX descriptor3. This bit will be
cleared by hardware when MAC finished the transmission.
1= enable
0= disable
Reserved
TX Packet Length (unit: byte)
Driver set this field to indicate AX88780 how many bytes will be
transmitted.
Default = 0x0000_0101
Reserved
RX Buffer Monitor Enable
When this bit is enable, MAC will monitor the status of the receive buffer.
1 = enable
0 = disable
Reserved.
RX Packet TCP/IP Checksum
When this bit is set, AX88780 will check the checksum of the received
packet that is IP, TCP or UDP packet. If there is checksum error, AX88780
will drop the packet and RXCHKSUMCNT counter will add 1.
1 = enable
0 = disable
Reserved
RX Buffer Protection
When this bit is enabled, MAC will protect the RX buffer to avoid overrun.
For normal operation, this bit should be enabled in initial stage.
1= enable
0= disable
23
ASIX ELECTRONICS CORPORATION
Description
Description
Description
AX88780