S29GL256P10FFI022 Spansion, S29GL256P10FFI022 Datasheet - Page 26

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S29GL256P10FFI022

Manufacturer Part Number
S29GL256P10FFI022
Description
Flash 256M, 3V, 110ns Parallel NOR Flash
Manufacturer
Spansion
Datasheet

Specifications of S29GL256P10FFI022

Rohs
yes
Data Bus Width
16 bit
Memory Type
NOR Flash
Memory Size
256 Mbit
Architecture
Uniform
Timing Type
Asynchronous
Interface Type
CFI
Access Time
100 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
110 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
FBGA-64
Organization
128 KB x 1024
26
7.7.2
Write Buffer Programming
Software Functions and Sample Code
Note
Base = Base Address.
The following is a C source code example of using the single word program function. Refer to the Spansion
Low Level Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash
memory software development guidelines.
Write Buffer Programming allows the system to write a maximum of 32 words in one programming operation.
This results in a faster effective word programming time than the standard “word” programming algorithms.
The Write Buffer Programming command sequence is initiated by first writing two unlock cycles. This is
followed by a third write cycle containing the Write Buffer Load command written at the Sector Address in
which programming occurs. At this point, the system writes the number of “word locations minus 1” that are
loaded into the page buffer at the Sector Address in which programming occurs. This tells the device how
many write buffer addresses are loaded with data and therefore when to expect the “Program Buffer to Flash”
confirm command. The number of locations to program cannot exceed the size of the write buffer or the
operation aborts. (Number loaded = the number of locations to program minus 1. For example, if the system
programs 6 address locations, then 05h should be written to the device.)
The system then writes the starting address/data combination. This starting address is the first address/data
pair to be programmed, and selects the “write-buffer-page” address. All subsequent address/data pairs must
fall within the elected write-buffer-page.
The “write-buffer-page” is selected by using the addresses A
The “write-buffer-page” addresses must be the same for all address/data pairs loaded into the write buffer.
(This means Write Buffer Programming cannot be performed across multiple “write-buffer-pages.” This also
means that Write Buffer Programming cannot be performed across multiple sectors. If the system attempts to
load programming data outside of the selected “write-buffer-page”, the operation ABORTs.)
After writing the Starting Address/Data pair, the system then writes the remaining address/data pairs into the
write buffer.
Note that if a Write Buffer address location is loaded multiple times, the “address/data pair” counter is
decremented for every data load operation. Also, the last data loaded at a location before the “Program Buffer
to Flash” confirm command is the data programmed into the device. It is the software's responsibility to
comprehend ramifications of loading a write-buffer location more than once. The counter decrements for each
data load operation, NOT for each unique write-buffer-address location. Once the specified number of write
buffer locations have been loaded, the system must then write the “Program Buffer to Flash” command at the
Sector Address. Any other address/data write combinations abort the Write Buffer Programming operation.
The Write Operation Status bits should be used while monitoring the last address location loaded into the
write buffer. This eliminates the need to store an address in memory because the system can load the last
address location, issue the program confirm command at the last loaded address location, and then check
the write operation status at that same address. DQ7, DQ6, DQ5, DQ2, and DQ1 should be monitored to
determine the device status during Write Buffer Programming.
/* Example: Program Command
/* Poll for program completion */
*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;
*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;
*( (UINT16 *)base_addr + 0x555 ) = 0x00A0;
*( (UINT16 *)pa )
Unlock Cycle 1
Unlock Cycle 2
Program Setup
Program
Cycle
S29GL-P MirrorBit
*/
Table 7.6 Single Word/Byte Program
(LLD Function = lld_ProgramCmd)
Operation
= data;
Write
Write
Write
Write
D a t a
®
Flash Family
/* write unlock cycle 1
/* write unlock cycle 2
/* write program setup command
/* write data to be programmed
S h e e t
Byte Address
Base + AAAh
Base + AAAh
Byte Address
Base + 555h
MAX
–A5.
S29GL-P_00_A14 October 22, 2012
Word Address
Word Address
Base + 2AAh
Base + 555h
Base + 555h
*/
*/
*/
*/
00AAh
0055h
00A0h
Data
Data

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