ISL6561CRZ Intersil, ISL6561CRZ Datasheet - Page 13

• Manufacturer Part Number: ISL6561CRZ
• Description: IC CTRLR PWM MULTIPHASE 40-QFN
• Manufacturer: Intersil

Specifications of ISL6561CRZ

• Applications: Controller, Intel VR10X
• Voltage - Input: 3 ~ 12 V
• Number Of Outputs: 4
• Voltage - Output: 0.84 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN, 40-VFQFPN
• Input Voltage: 12V
• Output Voltage: 1.65V
• Supply Voltage Range: 4.75V To 5.25V
• Digital Ic Case Style: QFN
• No. Of Pins: 40
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Control Mode: Voltage
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INDUCTOR DCR Sensing
An inductor has a distributed direct current winding
resistance (DCR). Consider the inductor DCR as a separate
lumped quantity as shown in Figure 4. The channel current,
I
DCR. Equation 4 shows the s-domain equivalent voltage,
V
A simple R-C network across the inductor extracts the DCR
voltage, as shown in Figure 5.
The voltage on the capacitor, V
proportional to the channel current I
If the R-C network components are selected such that the R-
C time constant matches the inductor L/DCR time constant,
then V
The capacitor voltage, V
resistor R
resistor is proportional to the inductor current. Equation 6
shows that the relationship between the channel current and
the sensed current I
resistor and the inductor DCR.
V
V
I
L
SEN
L
L
C
, flowing through the inductor, also passes through the
, across the inductor.
=
=
I
=


-------------------------------------------------------------------- -
L
ISL6561 INTERNAL CIRCUIT
C
s
SAMPLE
⋅
I
HOLD
⋅
L
is equal to the voltage drop across the DCR.
(
FIGURE 4. DCR SENSING CONFIGURATION
-------------
DCR
s L
&
ISEN
I
⋅
n
I SEN
----------------- -
R
⋅
L
DCR
(
ISEN
ISL6561
s RC
+
. so that the current flowing through the sense
+
⋅
DCR
=
1


PWM(n)
I
L
⋅
+
(
-------------------
R ISEN
SEN
)
DCR I
DCR
1
)
+
C
, is driven by the value of the sense
-
, is replicated across the sense
⋅
V
L
IN
)
13
C
ISEN-
, can be shown to be
ISEN+
R
INDUCTOR
L
L
(see Equation 5).
I
L
s ( )
V
L
V
DCR
C
-
C
(s)
-
R
ISEN
C
V
OUT
(EQ. 4)
(EQ. 5)
(EQ. 6)
OUT
ISL6561
Current Sampling
During the forced off-time following a PWM transition low, the
associated channel current sense amplifier reproduces a
signal , I
Regardless of the current sense method, I
scaled version of the inductor current. Coincident with the
falling edge of the PWM signal, the sample and hold circuitry
samples I
time, t
t
output current and held for one switching cycle. The sample
current is used for current balance, load-line regulation, and
overcurrent protection.
Channel-Current Balance
The sampled currents I
summed together and divided by the number of active
channels. The resulting cycle average current, I
provides a measure of the total load current demand on the
converter during each switching cycle. Channel current
balance is achieved by comparing the sampled current of
each channel to the cycle average current, and making an
appropriate adjustment to each channel pulse width based
on the error. Intersil’s patented current-balance method is
illustrated in Figure 6, with error correction for channel 1
represented. In the figure, the cycle average current
combines with the channel 1 sample, I
signal I
commanded by V
I
is applied to each active channel.
t
SW
ER
SAMP
. Therefore, the sample current, I
toward zero. The same method for error signal correction
SAMP
=
ER
SEN
t
--------- -
SEN
SW
. The filtered error signal modifies the pulse width
3
FIGURE 5. SAMPLE AND HOLD TIMING
, is fixed and equal to 1/3 of the switching period,
, proportional to the inductor current, I
. This is illustrated in Figure 5. The sample
=
----------------- -
3 f
COMP
⋅
1
SW
PWM
t
SAMP
n
, from each active channel are
to correct any unbalance and force
SWITCHING PERIOD
I
L
TIME
SAMPLE CURRENT, I
n
, is proportional to the
I
1
SEN
, to create an error
SEN
is simply a
AVG
n
L
May 12, 2005
,
.
(EQ. 7)
FN9098.5