DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 164

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
15.1
The UART module includes a dedicated 16-bit Baud
Rate Generator. The U1BRG register controls the
period of a free-running 16-bit timer. Equation 15-1
shows the formula for computation of the baud rate
with BRGH = 0.
EQUATION 15-1:
Example 15-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
EXAMPLE 15-1:
DS70178C-page 162
Note 1: Based on T
Desired Baud Rate
Solving for U1BRG value:
Calculated Baud Rate = 7500000/(16 (48 + 1))
Error
Note 1: F
CY
= 7.5 MHz
UART Baud Rate Generator (BRG)
2: Assuming external oscillator with fre-
3: Assuming external oscillator with fre-
U1BRG
U1BRG
U1BRG
Baud Rate =
U1BRG =
frequency (F
quency of 15 MHz and PLL disabled,
F
quency of 15 MHz and PLL enabled,
F
CY
CY
CY
denotes the instruction cycle clock
is 7.5 MHz.
is 30 MHz.
= Fcy/(16 (U1BRG + 1))
= ((F
= ((7500000/9600)/16) – 1
= 48
= 9566
= (Calculated Baud Rate – Desired Baud Rate)
= (9566 – 9600)/9600
= -0.35%
CY
UART BAUD RATE WITH
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
Desired Baud Rate
16 • (U1BRG + 1)
16 • Baud Rate
OSC
= 2/F
CY
/Desired Baud Rate)/16) – 1
/2).
F
F
OSC
CY
CY
(1,2,3)
, PLL are disabled.
– 1
Preliminary
The maximum baud rate (BRGH = 0) possible is
F
possible is F
Equation 15-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 15-2:
The maximum baud rate (BRGH = 1) possible is F
(for U1BRG = 0) and the minimum baud rate possible
is F
Writing a new value to the U1BRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note 1: F
CY
/16 (for U1BRG = 0), and the minimum baud rate
/(4 * 65536).
2: Assuming external oscillator with fre-
3: Assuming external oscillator with fre-
Baud Rate =
U1BRG =
CY
frequency.
quency of 15 MHz and PLL disabled,
F
quency of 15 MHz and PLL enabled,
F
CY
CY
CY
/(16 * 65536).
(1)
denotes the instruction cycle clock
is 7.5 MHz.
is 30 MHz.
UART BAUD RATE WITH
BRGH = 1
© 2006 Microchip Technology Inc.
4 • (U1BRG + 1)
4 • Baud Rate
F
F
CY
CY
(1,2,3)
– 1
CY
/4