DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 206

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
REGISTER 18-6:
DS70178C-page 204
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-8
bit 7-6
bit 5
bit 4-3
bit 3
bit 1-0
R/P
U-0
U-0
—
—
FCKSM<1:0>
Unimplemented: Read as ‘0’
FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, fail-safe clock monitor is disabled
01 = Clock switching is enabled, fail-safe clock monitor is disabled
00 = Clock switching is enabled, fail-safe clock monitor is enabled
FRANGE: Frequency Range Select for FRC and PLL bit
Acts like a “Gear Shift” feature that enables the dsPIC DSC device to operate at reduced MIPS at a
reduced supply voltage (3.3V)
FRANGE
Bit Value
1 = High Range
0 = Low Range
Unimplemented: Read as ‘0’
OSCIOFNC: OSC2 Pin I/O Enable bit
1 = CLKO output signal active on the OSCO pin
0 = CLKO output disabled
POSCMD<1:0>: Primary Oscillator Mode
11 = Primary Oscillator Disabled
10 = HS oscillator mode selected
01 = Reserved
00 = External clock mode selected
R/P
U-0
U-0
—
—
FOSC: OSCILLATOR SELECTION CONFIGURATION BITS
W = Writable bit
‘1’ = Bit is set
FRANGE
R/P
U-0
U-0
—
—
Temperature
Extended
Extended
Industrial
Industrial
Rating
U-0
U-0
U-0
Preliminary
—
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
U-0
—
—
—
FRC Frequency
14.55 MHz
(Nominal)
9.7 MHz
9.7 MHz
6.4 MHz
OSCIOFNC
U-0
U-0
R/P
—
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
466 MHz (480 MHz max.)
310 MHz (320 MHz max.)
310 MHz (320 MHz max.)
205 MHz (211 MHz max.)
U-0
U-0
R/P
—
—
POSCMD<1:0>
(Nominal)
PLL VCO
U-0
U-0
R/P
—
—
bit 16
bit 8
bit 0