DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 195

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 17-1:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-8
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CMPON
R/W-0
R/W-0
INSEL<1:0>
CMPON: A/D Operating Mode bit
1 = Comparator module is enabled
0 = Comparator module is disabled (reduces power consumption)
Unimplemented: Read as ‘0’
CMPSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode.
0 = Continue module operation in Idle mode.
If a device has multiple comparators, any CMPSIDL bit set to ‘1’ disables ALL comparators while in
Idle mode.
Reserved: Read as ‘0’
INSEL<1:0>: Input Source Select for Comparator bits
00 = Select CMPxA input pin
01 = Select CMPxB input pin
10 = Select CMPxC input pin
11 = Select CMPxD input pin
EXTREF: Enable External Reference bit
1 = External source provides reference to DAC
0 = Internal reference sources provide source to DAC
Reserved: Read as ‘0’
CMPSTAT: Current State of Comparator Output Including CMPPOL Selection bit
Reserved: Read as ‘0’
CMPPOL: Comparator Output Polarity Control bit
1 = Output is inverted
0 = Output is non inverted
RANGE: Selects DAC Output Voltage Range bit
1 = High Range: Max DAC value = AV
0 = Low Range: Max DAC value = INTREF, 1.2V ±1%
R/W-0
U-0
—
COMPARATOR CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
CMPSIDL
EXTREF
R/W-0
R/W-0
U-0
U-0
Preliminary
—
—
DD
/ 2, 2.5V @ 5 volt V
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CMPSTAT
R/W-0
U-0
—
dsPIC30F1010/202X
X
(CMPCONx)
DD
U-0
U-0
—
—
x = Bit is unknown
CMPPOL
R/W-0
U-0
—
DS70178C-page 193
RANGE
R/W-0
U-0
—
bit 8
bit 0