AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 163

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

16.7.6
16.7.6.1
32054F–AVR32–09/09
SmartMedia and NAND Flash Support
NAND Flash Signals
The External Bus Interface integrates circuitry that interfaces to SmartMedia and NAND Flash
devices.
The NAND Flash logic is driven by the Static Memory Controller on the NCS3 address space.
Programming the EBI_CS3A field in a specific HMATRIX_SFR Register to the appropriate value
enables the NAND Flash logic. For details on this register, refer to the Peripherals Section.
Access to an external NAND Flash device is then made by accessing the address space
reserved to NCS3 (i.e., between 0x0C00 0000 and 0x0FFF FFFF).
The NAND Flash Logic drives the read and write command signals of the SMC on the NANDOE
and NANDWE signals when the NCS3 signal is active. NANDOE and NANDWE are invalidated
as soon as the transfer address fails to lie in the NCS3 address space. See Figure
Signal Multiplexing on EBI Pins” on page 163
forms, refer to the Static Memory Controller Section.
The SmartMedia device is connected the same way as the NAND Flash device.
Figure 16-3. NAND Flash Signal Multiplexing on EBI Pins
The address latch enable and command latch enable signals on the NAND Flash device are
driven by address bits A22 and A21 of the EBI address bus. The user should note that any bit on
the EBI address bus can also be used for this purpose. The command, address or data words
on the data bus of the NAND Flash device are distinguished by using their address within the
NCSx address space. The chip enable (CE) signal of the device and the ready/busy (R/B) sig-
nals are connected to PIO lines. The CE signal then remains asserted even when NCSx is not
selected, preventing the device from returning to standby mode.
SMC
NWR0_NWE
NRD_NOE
NCSx
SmartMedia Logic
for more informations. For details on these wave-
NANDOE
NANDWE
AT32AP7002
NANDOE
NANDWE
”NAND Flash
163