AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 529
AT32AP7002-CTUT
Manufacturer Part Number
AT32AP7002-CTUT
Description
IC MCU 32BIT AVR32 196-CBGA
Manufacturer
Atmel
Series
AVR®32 AP7r
Specifications of AT32AP7002-CTUT
Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, LCD, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
196-CBGA
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
Maximum Clock Frequency
150 MHz
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 2 Channel
Package
196CTBGA
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Figure 28-3. SDRAM Controller Connections to SDRAM Devices: 16-bit Data Bus Width
28.5.2
32054F–AVR32–09/09
Software Interface
SDRAMC_A[0-12]
Controller
SDRAM
DQM[0-1]
SDCKE
D0-D31
SDWE
SDCS
SDCK
RAS
CAS
BA0
BA1
The SDRAM address space is organized into banks, rows, and columns. The SDRAMC allows
mapping different memory types according to the values set in the SDRAMC Configuration Reg-
ister (CR).
The SDRAMC’s function is to make the SDRAM device access protocol transparent to the user.
Table 28-2 on page 530
ping seen by the user in correlation with the device structure. Various configurations are
illustrated.
DQM0
D0-D7
D0-D7
CS
CLK
CKE
WE
RAS
CAS
DQM
SDRAM
2Mx8
A0-A9 A11
to
Table 28-7 on page 531
A10
BA0
BA1
SDRAMC_A10
BA1
BA0
illustrate the SDRAM device memory map-
D8-D15
DQM1
D0-D7
CS
CLK
CKE
RAS
CAS
WE
DQM
SDRAM
2Mx8
A0-A9 A11
BA0
BA1
A10
AT32AP7002
SDRAMC_A10
BA1
BA0
529
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