AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 349

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

23.7.1.3
32054F–AVR32–09/09
Receiver Clock Management
The transmitter can also drive the TX_CLOCK I/O pad continuously or be limited to the actual
data transfer. The clock output is configured by the TCMR register. The Transmit Clock Inver-
sion (CKI) bits have no effect on the clock outputs. Programming the TCMR register to select
TX_CLOCK pin (CKS field) and at the same time Continuous Transmit Clock (CKO field) might
lead to unpredictable results.
Figure 23-6. Transmitter Clock Management
The receiver clock is generated from the transmitter clock or the divider clock or an external
clock scanned on the RX_CLOCK I/O pad. The Receive Clock is selected by the CKS field in
RCMR (Receive Clock Mode Register). Receive Clocks can be inverted independently by the
CKI bits in RCMR.
The receiver can also drive the RX_CLOCK I/O pad continuously or be limited to the actual data
transfer. The clock output is configured by the RCMR register. The Receive Clock Inversion
(CKI) bits have no effect on the clock outputs. Programming the RCMR register to select
RX_CLOCK pin (CKS field) and at the same time Continuous Receive Clock (CKO field) can
lead to unpredictable results.
TX_CLOCK(pin)
Receiver
Divider
Clock
Clock
CKS
MUX
CKO
Controller
Tri-state
MUX
CKI
INV
Data Transfer
Controller
Tri-state
CKG
AT32AP7002
Transmitter
Output
Clock
Clock
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