AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 451

IC MCU 32BIT AVR32 196-CBGA

AT32AP7002-CTUT

Manufacturer Part Number
AT32AP7002-CTUT
Description
IC MCU 32BIT AVR32 196-CBGA
Manufacturer
Atmel
Series
AVR®32 AP7r
Datasheets

Specifications of AT32AP7002-CTUT

Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, LCD, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
196-CBGA
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
Maximum Clock Frequency
150 MHz
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 2 Channel
Package
196CTBGA
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32AP7002-CTUT
Manufacturer:
Atmel
Quantity:
10 000
25.7.4
25.7.5
25.7.5.1
32054F–AVR32–09/09
31
Variable Sample Rate
Power Management
Powering Down the AC-Link
Data read from AC97 Controller Channel x Receive Holding Register (CxRHR) when data size is
equal to 10 bits and when little endian mode is enabled.
The problem of variable sample rate can be summarized by a simple example. When passing a
44.1 kHz stream across the AC-link, for every 480 audio output frames that are sent across, 441
of them must contain valid sample data. The new AC97 standard approach calls for the addition
of “on-demand” slot request flags. The AC97 Codec examines its sample rate control register,
the state of its FIFOs, and the incoming SDATA_OUT tag bits (slot 0) of each output frame and
then determines which SLOTREQ bits to set active (low). These bits are passed from the AC97
Codec to the AC97 Controller in slot 1/SLOTREQ in every audio input frame. Each time the
AC97 controller sees one or more of the newly defined slot request flags set active (low) in a
given audio input frame, it must pass along the next PCM sample for the corresponding slot(s) in
the AC-link output frame that immediately follows.
The variable Sample Rate mode is enabled by performing the following steps:
Slot 1 of the input frame is automatically interpreted as SLOTREQ signaling bits. The AC97 Con-
troller will automatically fill the active slots according to both SLOTREQ and OCA register in the
next transmitted frame.
The AC97 Codecs can be placed in low power mode. The application can bring AC97 Codec to
a power down state by performing sequential writes to AC97 Codec powerdown register . Both
the bit clock (clock delivered by AC97 Codec, SCLK) and the input line (SDI) are held at a logic
low voltage level. This puts AC97 Codec in power down state while all its registers are still hold-
ing current values. Without the bit clock, the AC-link is completely in a power down state.
The AC97 Controller should not attempt to play or capture audio data until it has awakened
AC97 Codec.
To set the AC97 Codec in low power mode, the PR4 bit in the AC97 Codec powerdown register
(Codec address 0x26) must be set to 1. Then the primary Codec drives both BITCLK and SDI to
a low logic voltage level.
The following operations must be done to put AC97 Codec in low power mode:
At this point AC97 Codec is in low power mode.
24
•Setting the VRA bit in the AC97 Controller Mode Register (MR).
•Enable Variable Rate mode in the AC97 Codec by performing a transfer on the Codec
•Disable Channel A clearing CEN in the CAMR register.
•Disable Channel B clearing CEN field in the CBMR register.
•Write 0x2680 value in the COTHR register.
•Poll the TXEMPTY flag in CxSR registers for the 2 channels.
channel.
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16
15
Byte0[7:0]
8
7
AT32AP7002
0x00
3
1
Byte1
[1:0]
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0

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