DF2378BVFQ35WV Renesas Electronics America, DF2378BVFQ35WV Datasheet - Page 439

• Manufacturer Part Number: DF2378BVFQ35WV
• Description: IC H8S/2378 MCU FLASH 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378BVFQ35WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 35MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• For Use With: EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
12
11
10
9
8
Bit Name
SARA4
SARA3
SARA2
SARA1
SARA0
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Source Address Repeat Area
These bits specify the source address (EDSAR)
repeat area. The repeat area function updates the
specified lower address bits, leaving the remaining
upper address bits always the same. A repeat area
size of 2 bytes to 8 Mbytes can be specified. The
setting interval is a power-of-two number of bytes.
When repeat area overflow results from
incrementing or decrementing an address, the
lower address is the start address of the repeat
area in the case of address incrementing, or the
last address of the repeat area in the case of
address decrementing. If the SARIE bit is set to 1,
an interrupt can be requested when repeat area
overflow occurs.
00000: Not designated as repeat area
00001: Lower 1 bit (2-byte area) designated as
00010: Lower 2 bits (4-byte area) designated as
00011: Lower 3 bits (8-byte area) designated as
00100: Lower 4 bits (16-byte area) designated as
10011: Lower 19 bits (512-kbyte area) designated
10100: Lower 20 bits (1-Mbyte area) designated as
10101: Lower 21 bits (2-Mbyte area) designated as
10110: Lower 22 bits (4-Mbyte area) designated as
10111: Lower 23 bits (8-Mbyte area) designated as
11×××: Setting prohibited
repeat area
repeat area
repeat area
repeat area
as repeat area
repeat area
repeat area
repeat area
repeat area
Rev.7.00 Mar. 18, 2009 page 371 of 1136
:
Section 8 EXDMA Controller (EXDMAC)
:
REJ09B0109-0700