DF2378BVFQ35WV Renesas Electronics America, DF2378BVFQ35WV Datasheet - Page 56

• Manufacturer Part Number: DF2378BVFQ35WV
• Description: IC H8S/2378 MCU FLASH 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378BVFQ35WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 35MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• For Use With: EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 15.35 Example of Synchronous Transmission Using DTC............................................... 766
Figure 15.36 Sample Flowchart for Mode Transition during Transmission................................. 768
Figure 15.37 Port Pin States during Mode Transition
Figure 15.38 Port Pin States during Mode Transition
Figure 15.39 Sample Flowchart for Mode Transition during Reception ...................................... 770
Section 16 I
Figure 16.1 Block Diagram of I
Figure 16.2 External Circuit Connections of I/O Pins ................................................................ 773
Figure 16.3 I
Figure 16.4 I
Figure 16.5 Master Transmit Mode Operation Timing 1............................................................ 788
Figure 16.6 Master Transmit Mode Operation Timing 2............................................................ 788
Figure 16.7 Master Receive Mode Operation Timing 1 ............................................................. 790
Figure 16.8 Master Receive Mode Operation Timing 2 ............................................................. 791
Figure 16.9 Slave Transmit Mode Operation Timing 1.............................................................. 792
Figure 16.10 Slave Transmit Mode Operation Timing 2.............................................................. 793
Figure 16.11 Slave Receive Mode Operation Timing 1 ............................................................... 795
Figure 16.12 Slave Receive Mode Operation Timing 2 ............................................................... 795
Figure 16.13 Block Diagram of Noise Canceler........................................................................... 796
Figure 16.14 Sample Flowchart for Master Transmit Mode ........................................................ 797
Figure 16.15 Sample Flowchart for Master Receive Mode .......................................................... 798
Figure 16.16 Sample Flowchart for Slave Transmit Mode........................................................... 799
Figure 16.17 Sample Flowchart for Slave Receive Mode ............................................................ 800
Figure 16.18 Timing of the Bit Synchronous Circuit ................................................................... 802
Section 17 A/D Converter ................................................................................. 805
Figure 17.1 Block Diagram of A/D Converter ........................................................................... 806
Figure 17.2 A/D Conversion Timing.......................................................................................... 814
Figure 17.3 External Trigger Input Timing ................................................................................ 815
Figure 17.4 A/D Conversion Accuracy Definitions ................................................................... 817
Figure 17.5 A/D Conversion Accuracy Definitions ................................................................... 817
Figure 17.6 Example of Analog Input Circuit ............................................................................ 818
Figure 17.7 Example of Analog Input Protection Circuit ........................................................... 820
Section 18 D/A Converter ................................................................................. 821
Figure 18.1 Block Diagram of D/A Converter for H8S/2378 0.18μm F-ZTAT Group,
Rev.7.00 Mar. 18, 2009 page liv of lxvi
REJ09B0109-0700
(Internal Clock, Asynchronous Transmission) ........................................................ 769
(Internal Clock, Synchronous Transmission) .......................................................... 769
H8S/2378R 0.18μm F-ZTAT Group, H8S/2377, and H8S/2377R ......................... 822
2
2
C Bus Formats ...................................................................................................... 786
C Bus Timing........................................................................................................ 786
2
C Bus Interface 2 (IIC2) (Option)................................................. 771
2
C Bus Interface 2..................................................................... 772