HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 210

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

10.1.3
Table 10.1 lists the BSC pins.
Table 10.1 Pin Configuration
Pin Name
Address bus
Data bus
Data bus/port
Bus cycle start
Chip select 6–0
Read/write
Row address
strobe
Column address
strobe
Column address
strobe LH
Column address
strobe HL
Column address
strobe HH
190
Pin Configuration
Signal
A25–A0
D31–D24,
D15–D0
D23–D16/
PORT7–PORT0
BS
CS6–CS0
RD/WR
RAS/CE
CAS/CASLL/
OE
CASLH
CASHL, CAS2L O
CASHH, CAS2H O
I/O
O
I/O
I/O
O
O
O
O
O
O
Description
Address output
Data I/O
When port function is used, D31–D24 cannot be
used. Leave these pins open.
When port function is not used, data I/O; when port
function is used, port (I/O is set by register for each
bit)
Shows start of bus cycle. During burst transfers,
asserts every data cycle.
Chip select signal to indicate area being accessed.
CS5 and CS6 can also be used as CE1A and CE1B
of PCMCIA.
Data bus direction indicator signal.
DRAM/synchronous DRAM/PCMCIA write indicator
signal.
When DRAM/synchronous DRAM is used, RAS
signal. When pseudo-SRAM is used, CE signal.
When synchronous DRAM is used, CAS signal.
When DRAM is used, CAS signal for D7–D0. When
pseudo-SRAM is used, OE/RFSH signal.
When DRAM is used, CAS signal for D15–D8
When DRAM is used, CAS signal for D23–D16.
When the area 2 DRAM is being used, CAS signal
for D7–D0.
When DRAM is used, CAS signal for D31–D24.
When the area 2 DRAM is being used, CAS signal
for D15–D8.