HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 321

IC SUPERH MPU ROMLESS 208LQFP

HD6417708SF60V

Manufacturer Part Number
HD6417708SF60V
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60V

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
11.1
The SH7708 Series uses a three-channel 32-bit timer unit (TMU).
11.1.1
The TMU has the following features:
11.1.2
Figure 11.1 shows a block diagram of the TMU.
Each channel is provided with an auto-reload 32-bit down counter
Channel 2 is provided with an input capture function
All channels are provided with 32-bit constant registers and 32-bit down counters that can be
read or written to at any time
All channels generate interrupt requests when the 32-bit down counter underflows
(H'00000000
Allows selection between 6 counter input clocks: External clock (TCLK), on-chip RTC output
clock (16 kHz), P /4, P /16, P /64, P /256. (P is the internal clock for peripheral modules
and can be selected as 1/4, 1/2, or the same frequency as that of the CPU operating clock .)
See section 9, On-Chip Oscillation Circuits, for more information on the clock pulse generator.
All channels can operate when the SH7708 Series is in standby mode: When the RTC output
clock is being used as the counter input clock, the SH7708 Series is still able to count in
standby mode.
Synchronized read: TCNT is a sequentially changing 32-bit register. Since the peripheral
module used has an internal bus width of 16 bits, a time lag can occur between the time when
the upper 16 bits and lower 16 bits are read. To correct the discrepancy in the counter read
value caused by this time lag, a synchronization circuit is built into the TCNT so that the entire
32-bit data in the TCNT can be read at once.
The maximum operating frequency of the 32-bit counter is 2 MHz on all channels: Operate the
SH7708 Series so that the clock input to the timer counters of each channel (obtained by
dividing the external clock and internal clock with the prescaler) does not exceed the
maximum operating frequency.
Overview
Features
Block Diagram
H'FFFFFFFF)
Section 11 Timer (TMU)
301

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