HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 42

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

2.3.2
Addressing modes and effective address calculation methods are shown in table 2.2.
Table 2.2
Addressing
Mode
Register direct Rn
Register
indirect
Register
indirect with
post-increment
Register
indirect with
pre-decrement
22
Addressing Modes
Addressing Modes and Effective Addresses
Instruction
Format
@Rn
@Rn+
@–Rn
Effective Address Calculation Method
Effective address is register Rn. (Operand is
register Rn contents.)
Effective address is register Rn contents.
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
Effective address is register Rn contents,
decremented by a constant beforehand: 1 for
a byte operand, 2 for a word operand, 4 for a
longword operand.
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn – 1/2/4
+
–
Rn – 1/2/4
Rn
Rn
Calculation Formula
—
Rn
Rn
After instruction
execution
Byte: Rn + 1
Word: Rn + 2
Longword: Rn + 4
Byte: Rn – 1
Word: Rn – 2
Longword: Rn – 4
(Instruction executed
with Rn after
calculation)
Rn
Rn
Rn
Rn
Rn
Rn