HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 236

• Manufacturer Part Number: HD6417708SF60V
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417708SF60V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, SCI, SmartCard
• Peripherals: POR, WDT
• Number Of I /o: 8
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -

Bit 1—Refresh Mode (RMODE): Selects the refresh mode for the DRAM connected to area 2.
Bit 1: RMODE
0
1
10.2.7
The PCMCIA control register (PCR) is a 16-bit read/write register that specifies the OE and WE
signal assert/negate timing for PCMCIA interfaces connected to areas 5 and 6. The OE and WE
signal assert pulse widths are designated by the WCR2 wait control bits. This register is initialized
to H'0000 by a power-on reset, but is not initialized by a manual reset or in standby mode, and
retains its contents.
Bits 15 to 8—Reserved: These bits always read 0. The write value should always be 0.
Bits 7 and 6—Area 5 Address OE/WE Assert Delay (A5TED1, A5TED0): These bits specify the
address to OE/WE assert delay time for the PCMCIA interface connected to area 5.
Bit 7: A5TED1
0
1
216
Initial value:
Initial value:
Bit name:
Bit name: A5TED1 A5TED0 A6TED1 A6TED0 A5TEH1 A5TEH0 A6TEH1 A6TEH0
PCMCIA Control Register (PCR)
R/W:
R/W:
Bit:
Bit:
Bit 6: A5TED0
0
1
0
1
Description
CAS-before-RAS refresh (RFSH must be 1)
Self-refresh (RFSH must be 1)
R/W
15
—
0
R
7
0
R/W
14
—
0
R
6
0
Description
0.5 cycle delay
1.5 cycle delay
2.5 cycle delay
3.5 cycle delay
R/W
13
—
0
R
5
0
R/W
12
—
0
R
4
0
R/W
11
—
0
R
3
0
R/W
10
—
0
R
2
0
R/W
—
9
0
R
1
0
(Initial value)
(Initial value)
R/W
—
8
0
R
0
0