HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 241

IC SUPERH MPU ROMLESS 208LQFP

HD6417708SF60V

Manufacturer Part Number
HD6417708SF60V
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60V

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.2.11 Refresh Time Constant Register (RTCOR)
The refresh time constant register (RTCOR) is a 16-bit read/write register. The values of RTCOR
and RTCNT (lower 8 bits) are constantly compared. When the values match, the compare match
flag (CMF) in RTCSR is set and RTCNT is cleared to 0. When the refresh bit (RFSH) in the
individual memory control register (MCR) is set to 1 and the refresh mode is set to CAS-before-
RAS refresh, a memory refresh cycle occurs when the CMF bit is set. RTCOR is initialized to
H'00 by a power-on reset. It is not initialized by a manual reset or in standby mode, but retains its
contents.
Note: The method for writing to RTCOR is different from that for general registers to prevent
10.2.12 Refresh Count Register (RFCR)
The refresh count register (RFCR) is a 16-bit read/write register containing a 10-bit counter that
increments every time RTCOR and RTCNT match. When RFCR exceeds the count limit value set
Initial value:
Initial value:
Initial value:
Initial value:
inadvertent overwriting. Using a word transfer instruction, place B'10100101 in the upper
byte and the write data in the lower byte. For details, see section 10.2.13, Cautions on
Accessing Refresh Control Related Registers.
Bit name:
Bit name:
Bit name:
Bit name:
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
R/W
R/W
15
15
0
R
7
0
0
R
7
0
R/W
R/W
14
14
0
R
6
0
0
R
6
0
R/W
R/W
13
13
0
R
5
0
0
R
5
0
R/W
R/W
12
12
0
R
4
0
0
R
4
0
R/W
R/W
11
11
0
R
3
0
0
R
3
0
R/W
R/W
10
10
0
R
2
0
0
R
2
0
R/W
R/W
9
0
R
1
0
9
0
R
1
0
R/W
R/W
8
0
R
0
0
8
0
R
0
0
221

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