P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 15

IC 80C51 MCU 8BIT ROMLESS 68PLCC

P80C592FFA/00,512

Manufacturer Part Number
P80C592FFA/00,512
Description
IC 80C51 MCU 8BIT ROMLESS 68PLCC
Manufacturer
NXP Semiconductors
Series
80Cr
Datasheet

Specifications of P80C592FFA/00,512

Program Memory Type
ROMless
Package / Case
68-PLCC
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
48
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P80C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
CAN/UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
40
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
80C
Device Core
80C51
Device Core Size
8b
Frequency (max)
16MHz
Program Memory Size
Not Required
Total Internal Ram Size
512Byte
# I/os (max)
40
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1241-5
935086530512
P80C592FFAA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P80C592FFA/00,512
Manufacturer:
ON
Quantity:
300
Part Number:
P80C592FFA/00,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
8
The P8xC592 has six 8-bit parallel ports: Port 0 to Port 5. In addition to the standard 8-bit parallel ports, the I/O facilities
also include a number of special I/O lines. The use of a Port 1, Port 3 or Port 4 pins as an alternative function is carried
out automatically provided the associated SFR bit is set HIGH.
Table 5 Default Port functions
Table 6 Alternative Port functions
1996 Jun 27
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
PORT TYPE
PORT TYPE
8-bit microcontroller with on-chip CAN
I/O PORT STRUCTURE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
The same as in the 80C51
Parallel l/O port
Parallel input port with an input function only
Multiplexed Low-order address and
Data bus for external memory (AD7 to AD0)
Capture timer inputs for Timer T2
(CT0I to CT3I), or
External interrupt request inputs
(INT2 to INT5)
T2 event input (T2)
T2 timer reset input (RT2)
CAN transmitter output 0 (CTX0)
CAN transmitter output 1 (CTX1)
High-order address byte for external memory
(A08 to A15)
Serial Input Port (RXD)
Serial Output Port (TXD)
External interrupt (INT0)
External interrupt (INT1)
Timer 0 external input (T0)
Timer 1 external input (T1)
External data memory Write strobe (WR)
External data memory Read strobe (RD)
Compare and Set/Reset outputs
(CMSR0 to CMSR5)
Compare and toggle outputs (CMT0, CMT1)
Input channels to ADC (ADC7 to ADC0)
FUNCTION
FUNCTION
15
Except for the additional functions of P1.6 and
P1.7.
Parallel I/O function is identical to Port1, 2 and 3.
May be used as normal inputs if the ADC function
is inoperative.
Provides the multiplexed Low-order address and
data bus used for expanding the P8xC592 with
standard memories and peripherals.
External interrupt request inputs, if capture
information is not utilized.
External counter input.
External counter reset input.
CTX0 and CTX1 outputs of the CAN interface
(note 1).
Port 2 provides the High-order address bus when
the P8xC592 is expanded with external Program
Memory and/or external Data Memory.
Receiver input of serial port SIO0 (UART).
Transmitter output of serial port SIO0 (UART).
External interrupt request inputs.
Counter inputs.
Control signal to write to external Data Memory.
Control signal to read from external Data Memory.
Can be configured to provide signals indicating a
match between Timer counter T2 and its compare
registers.
Port 5 may be used in conjunction with the ADC
interface (note 2).
REMARKS
REMARKS
Product specification
P8xC592

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