P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 66

• Manufacturer Part Number: P80C592FFA/00,512
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,512

• Program Memory Type: ROMless
• Package / Case: 68-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN/UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1241-5; 935086530512; P80C592FFAA

Philips Semiconductors
14.1.3
Table 75 Interrupt Priority register 0 (address B8H)
Table 76 Description of the IP0 bits
14.1.4
Table 77 Interrupt Priority register 1 (address F8H)
Table 78 Description of the IP1 bits
Logic 0 = low priority; Logic 1 = high priority.
1996 Jun 27
8-bit microcontroller with on-chip CAN
PT2
BIT
BIT
7
7
6
5
4
3
2
1
0
7
7
6
5
4
3
2
1
0
I
I
NTERRUPT
NTERRUPT
PAD
PS1
PS0
PT1
PX1
PT0
PX0
PT2
PCM2
PCM1
PCM0
PCT3
PCT2
PCT1
PCT0
SYMBOL
SYMBOL
PCM2
PAD
P
P
6
6
RIORITY REGISTER
RIORITY REGISTER
Not used.
ADC interrupt priority level.
SIO1 (CAN) interrupt priority level.
SIO0 (UART) interrupt priority level.
Timer 1 interrupt priority level.
External interrupt 1 priority level.
Timer 0 interrupt priority level.
External interrupt 0 priority level.
T2 overflow interrupt(s) priority level.
T2 comparator 2 priority interrupt level.
T2 comparator 1 priority interrupt level.
T2 comparator 0 priority interrupt level.
T2 capture register 3 priority interrupt level.
T2 capture register 2 priority interrupt level.
T2 capture register 1 priority interrupt level.
T2 capture register 0 priority interrupt level.
PCM1
PS1
5
5
0 (IP0)
1 (IP1)
PCM0
PS0
4
4
66
PCT3
PT1
3
3
FUNCTION
FUNCTION
PCT2
PX1
2
2
PCT1
PT0
1
1
Product specification
P8xC592
PCT0
PX0
0
0