P80C592FFA/00,512 NXP Semiconductors, P80C592FFA/00,512 Datasheet - Page 65

• Manufacturer Part Number: P80C592FFA/00,512
• Description: IC 80C51 MCU 8BIT ROMLESS 68PLCC
• Manufacturer: NXP Semiconductors
• Series: 80Cr

Specifications of P80C592FFA/00,512

• Program Memory Type: ROMless
• Package / Case: 68-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 48
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P80C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN/UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1241-5; 935086530512; P80C592FFAA

Philips Semiconductors
14.1
14.1.1
Table 71 Interrupt Enable register 0 (address A8H)
Table 72 Description of the IEN0 bits
14.1.2
Table 73 Interrupt Enable register 0 (address E8H)
Table 74 Description of the IEN1 bits
Logic 0 = interrupt disabled; Logic 1 = interrupt enabled.
1996 Jun 27
8-bit microcontroller with on-chip CAN
ET2
BIT
BIT
EA
7
7
6
5
4
3
2
1
0
7
7
6
5
4
3
2
1
0
Interrupt Enable and Priority Registers
I
I
NTERRUPT
NTERRUPT
EA
EAD
ES1
ES0
ET1
EX1
ET0
EX0
ET2
ECM2
ECM1
ECM0
ECT3
ECT1
ECT1
ECT0
SYMBOL
SYMBOL
ECM2
EAD
E
E
6
6
NABLE REGISTER
NABLE REGISTER
General enable/disable control. If bit EA is:
Enable ADC interrupt.
Enable SIO1 (CAN) interrupt.
Enable SIO0 (UART) interrupt.
Enable Timer 1 interrupt.
Enable External 1 interrupt.
Enable Timer 0 interrupt.
Enable External 0 interrupt.
Enable T2 overflow interrupt(s).
Enable T2 comparator 2 interrupt.
Enable T2 comparator 1 interrupt.
Enable T2 comparator 0 interrupt.
Enable T2 capture register 3 interrupt.
Enable T2 capture register 2 interrupt.
Enable T2 capture register 1 interrupt.
Enable T2 capture register 0 interrupt.
LOW, then no interrupt is enabled.
HIGH, then any individually enabled interrupt will be accepted.
ECM1
ES1
5
5
0 (IEN0)
1 (IEN1)
ECM0
ES0
4
4
65
ECT3
ET1
3
3
FUNCTION
FUNCTION
ECT2
EX1
2
2
ECT1
ET0
1
1
Product specification
P8xC592
ECT0
EX0
0
0