MC908QY4ACDWE Freescale Semiconductor, MC908QY4ACDWE Datasheet - Page 99

IC MCU 8BIT 4K FLASH 16-SOIC

MC908QY4ACDWE

Manufacturer Part Number
MC908QY4ACDWE
Description
IC MCU 8BIT 4K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QY4ACDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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11.6 OSC During Break Interrupts
There are no status flags associated with the OSC module.
The system integration module (SIM) controls whether status bits in other modules can be cleared during
the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status
bits during the break state. See BFCR in the SIM section of this data
To allow software to clear status bits during a break interrupt, write a 1 to BCFE. If a status bit is cleared
during the break state, it remains cleared when the MCU exits the break state.
To protect status bits during the break state, write a 0 to BCFE. With BCFE cleared (its default state),
software can read and write registers during the break state without affecting status bits. Some status bits
have a two-step read/write clearing procedure. If software does the first step on such a bit before the
break, the bit cannot change during the break state as long as BCFE is cleared. After the break, doing the
second step clears the status bit.
11.7 I/O Signals
The OSC shares its pins with general-purpose input/output (I/O) port pins. See
location of these shared pins.
11.7.1 Oscillator Input Pin (OSC1)
The OSC1 pin is an input to the crystal oscillator amplifier, an input to the RC oscillator circuit, or an input
from an external clock source.
When the OSC is configured for internal oscillator, the OSC1 pin can be used as a general-purpose
input/output (I/O) port pin or other alternative pin function.
11.7.2 Oscillator Output Pin (OSC2)
For the XTAL oscillator option, the OSC2 pin is the output of the crystal oscillator amplifier.
When the OSC is configured for internal oscillator, external clock, or RC, the OSC2 pin can be used as a
general-purpose I/O port pin or other alternative pin function. When the oscillator is configured for internal
or RC, the OSC2 pin can be used to output BUSCLKX4.
Freescale Semiconductor
Internal oscillator
XTAL oscillator
External clock
RC oscillator
Option
or
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
Inverting OSC1
General-purpose I/O or alternative pin function
Controlled by OSC2EN bit
Table 11-1. OSC2 Pin Function
OSC2EN = 0: General-purpose I/O or alternative pin function
OSC2EN = 1: BUSCLKX4 output
OSC2 Pin Function
sheet.
OSC During Break Interrupts
Figure 11-1
for port
99

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