R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 160

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 15.5
IIC Bus Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
1.
2.
3.
4.
5.
6.
7. Refer to 20.6.1 Access of Registers Associated w ith IIC for the access of registers associated w ith IIC.
0
Rew rite betw een transfer frames. When w rite values other than “000b”, w rite w hen the SCL signal is “L”.
When w rite to the BC0 to BC2 bits, w rite “0” to the BCWP bit using the MOV instruction.
After data including the acknow ledge bit is transferred, this bit is automatically set to “000b”.
Do not rew rite w hen the clock synchronous serial format is used.
The setting value is enabled in master mode of the I
bus format or w hen the clock synchronous serial format is used.
Set to “0” w hen the I
Jan 19, 2006
ICMR Register
Bit Symbol
Symbol
(7)
BCWP
WAIT
ICMR
BC0
BC1
BC2
(b4)
(b5)
MLS
Page 145 of 254
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2
C bus format is used.
Bit Counter 2 to 0
BC Write Protect Bit
Nothing is assigned. When w rite, set to “0”.
When read, its content is “1”.
Reserved Bit
Wait Insertion Bit
MSB-First / LSB-First Select
Bit
Address
Bit Name
00BAh
(5)
2
C bus format. It is disabled in slave mode of the I
I
w hen read out and data bit numbers of transfer to
the next w hen w rite)
Clock synchronous serial format (w hen read, read
the remaining transfer bit numbers and w hen w rite,
w rite “000b”.)
When rew rite to the BC0 to BC2 bits, w rite “0”
simultaneously
When read, its content is “1”.
Set to “0”.
0 : No w ait
1 : Wait
0 : Data transfer by MSB-first
1 : Data transfer by LSB-first
2
b2 b1 b0
b2 b1 b0
0 0 0 : 9 bits
0 0 1 : 2 bits
0 1 0 : 3 bits
0 1 1 : 4 bits
1 0 0 : 5 bits
1 0 1 : 6 bits
1 1 0 : 7 bits
1 1 1 : 8 bits
0 0 0 : 8 bits
0 0 1 : 1 bit
0 1 0 : 2 bits
0 1 1 : 3 bits
1 0 0 : 4 bits
1 0 1 : 5 bits
1 1 0 : 6 bits
1 1 1 : 7 bits
C bus format (remaining transfer bit numbers
(Transfer data and acknow ledge bit
(After the falling of the clock for the final
consecutively)
data bit, “L” period is extended for tw o
transfer clocks)
(3)
(2, 4)
.
After Reset
00011000b
(1, 2)
Function
(6)
15. I
2
C bus interface (IIC)
2
C
RW
RW
RW
RW
RW
RW
RW
RW
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