R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 91

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
11.4
Table 11.6
NOTES:
Table 11.7
• 16-bit operation code instruction
• Instruction shown below among 8-bit operation code instructions
ADD.B:S
OR.B:S
STNZ.B:S
CMP.B:S
JMPS
MOV.B:S
• Instructions other than the above
Address Match Interrupt Factor Address Match Interrupt Enable Bit
Address Match Interrupt 0
Address Match Interrupt 1
An address match interrupt request is generated immediately before executing the instruction at the
address indicated by the RMADi register (i=0, 1). This interrupt is used for a break function of the
debugger. When using the on-chip debugger, do not set an address match interrupt (the registers of
AIER, RMAD0, RMAD1 and the fixed vector tables) in a user system.
Set the starting address of any instruction in the RMADi register. The AIER0 and AIER1 bits in the
AIER0 register can select to enable or disable the interrupt. The I flag and IPL do not affect the address
match interrupt.
The value of the PC (Refer to 11.1.6.7 Saving a Register for the value of the PC) which is saved to the
stack when an address match interrupt is acknowledged varies depending on the instruction at the
address indicated by the RMADi register (The appropriate return address is not pushed on the stack).
When returning from the address match interrupt, return by one of the following:
Table 11.6 lists the Value of PC Saved to Stack when Address Match Interrupt is Acknowledged.
Figure 11.19 shows the AIER and RMAD0 to RMAD1 Registers.
1. Refer to the 11.1.6.7 Saving a Register for the saved PC value.
•
•
Change the content of the stack and use the REIT instruction.
Use an instruction such as POP to restore the stack as it was before an interrupt request was
acknowledged. And then use a jump instruction.
Address Match Interrupt
Jan 19, 2006
#IMM8,dest SUB.B:S
#IMM8,dest MOV.B:S #IMM8,dest STZ.B:S
#IMM8,dest STZX.B:S #IMM81,#IMM82,dest
#IMM8,dest PUSHM
#IMM8
#IMM,dest (However, dest = A0 or A1)
Value of PC Saved to Stack when Address Match Interrupt is Acknowledged
Between Address Match Interrupt Factor and Associated Registers
Address Indicated by RMADi Register (i=0,1)
Page 76 of 254
JSRS
AIER0
AIER1
#IMM8,dest AND.B:S
src
#IMM8
POPM
#IMM8,dest
#IMM8,dest
dest
RMAD0
RMAD1
Address Match Interrupt Register
Address indicated by
RMADi register + 2
Address indicated by
RMADi register + 1
PC Value Saved
11. Interrupt
(1)