R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 52

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
8.
During access, the ROM/RAM and SFR vary from bus cycles. Table 8.1 lists Bus Cycles for Access Area of
the R8C/16 Group and Table 8.2 lists Bus Cycles for Access Space of the R8C/17 Group.
The ROM/RAM and SFR are connected to the CPU through an 8-bit bus. When accessing in word-(16 bits)
unit, these area are accessed twice in 8-bit unit. Table 8.3 lists Access Unit and Bus Operation.
Table 8.1
Table 8.2
Table 8.3
SFR
ROM/RAM
SFR/Data flash
Program ROM/RAM
Bus
Even Address
Even Address
Word Access
Odd Address
Word Access
Byte Access
Odd Address
Byte Access
Access Area
Access Area
Area
Jan 19, 2006
Access Unit and Bus Operation
Bus Cycles for Access Area of the R8C/16 Group
Bus Cycles for Access Space of the R8C/17 Group
CPU Clock
CPU Clock
CPU Clock
CPU Clock
Address
Address
Address
Address
Data
Data
Data
Data
Page 37 of 254
2 cycles of CPU clock
1 cycle of CPU clock
2 cycles of CPU clock
1 cycle of CPU clock
SFR, Data flash
Even
Odd
Bus Cycle
Bus Cycle
Data
Data
Even
Odd
Odd+1
Even+1
Data
Data
Data
Data
CPU Clock
CPU Clock
CPU Clock
CPU Clock
Address
Address
Address
Address
Data
Data
Data
Data
ROM (Program ROM), RAM
Odd
Even
Odd
Even
Data
Data
Data
Data
Even+1
Odd+1
Data
Data
8. Bus