R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 57

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 9.4
Oscillation Stop Detection Register
b7 b6 b5 b4 b3 b2 b1 b0
NOTES :
0 0 0 0
1.
2.
3.
4.
5.
6.
7.
Set the PRC0 bit in the PRCR register to “1” (enables w riting) before rew riting to this register.
The OCD2 bit is automatically set to “1” (selects on-chip oscillator clock) if a main clock oscillation stop is detected
w hile the OCD1 to OCD0 bits are set to “11b” (oscillation stop detection function enabled). If the OCD3 bit is set to “1”
(main clock stops), the OCD2 bit remains unchanged w hen w riting “0” (selects main
clock).
The OCD3 bit is enabled w hen the OCD1 to OCD0 bits are set to “11b”.
Set the OCD1 to OCD0 bits to “00b” (oscillation stop detection function disabled) before entering stop and on-chip
oscillator mode (main clock stops).
The OCD3 bit remains “0” (main clock oscillates) if the OCD1 to OCD0 bits are set to “00b”.
The CM14 bit is set to “0” (low -speed on-chip oscillator on) if the OCD2 bit is set to “1” (selects on-chip oscillator
clock).
Refer to Figure 9.9 Procedure of Sw itching Clock Source From Low -Speed On-Chip Oscillator to Main
Clock for the sw itching procedure w hen the main clock re-oscillates after detecting an oscillation stop.
Jan 19, 2006
OCD Register
Bit Symbol
(b7-b4)
Symbol
OCD0
OCD1
OCD2
OCD3
OCD
Page 42 of 254
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Oscillation Stop Detection
Enable Bit
System Clock Select Bit
Clock Monitor Bit
Reserved Bit
(1)
Address
Bit Name
000Ch
(3,5)
(6)
b1 b0
0 0 : Oscillation stop detection function
0 1 : Do not set
1 0 : Do not set
1 1 : Oscillation stop detection function
0 : Selects main clock
1 : Selects on-chip oscillator clock
0 : Main clock oscillates
1 : Main clock stops
Set to “0”
disabled
enabled
(4,7)
After Reset
Function
(7)
04h
9. Clock Generation Circuit
(2)
RW
RW
RW
RW
RW
RO