R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 254
R5F21162SP#U0
Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21173DSPU0.pdf
(40 pages)
3.R5F21173DSPU0.pdf
(281 pages)
Specifications of R5F21162SP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Download datasheet (4Mb)
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
20.2.6
Sample programs 1 to 3 are preventing the I flag from being set to “1” (interrupt enables) before
changing the interrupt control register for reasons of the internal bus or the instruction queue buffer.
Example 1: Use NOP instructions to prevent I flag being set to “1” before interrupt control
Example 2: Use dummy read to have FSET instruction wait
Example 3: Use POPC instruction to change I flag
(a) Each interrupt control register can only be changed while interrupt requests corresponding to
(b) When changing any interrupt control register after disabling interrupts, be careful with the
(c) When disabling interrupts using the I flag, set the I flag according to the following sample
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
Jan 19, 2006
Changing Interrupt Control Register
that register are not generated. If interrupt requests may be generated, disable the interrupts
before changing the interrupt control register.
instructions to be used.
When changing any bit other than IR bit
If an interrupt request corresponding to that register is generated while executing the
instruction, the IR bit may not be set to “1” (interrupt requested), and the interrupt request may
be ignored. If this causes a problem, use the following instructions to change the register.
Instructions to use: AND, OR, BCLR, BSET
When changing IR bit
If the IR bit is set to “0” (interrupt not requested), it may not be set to “0” depending on the
instruction to be used. Therefore, use the MOV instruction to set the IR bit to “0”.
programs. Refer to (b) for the change of interrupt control registers in the sample programs.
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM, R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
register is changed
I
#00H, 0056H
I
I
#00H, 0056H
I
I
#00H, 0056H
FLG
Page 239 of 254
; Set TXIC register to “00h”
;
; Set TXIC register to “00h”
; Set TXIC register to “00h”
; Disable interrupts
; Enable interrupts
; Disable interrupts
; Dummy read
; Enable interrupts
; Disable interrupts
; Enable interrupts
20. Precautions
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