R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 218

IC R8C MCU FLASH 8K 20SSOP

R5F21162SP#U0

Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets

Specifications of R5F21162SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 18.5
Flash Memory Control Register 0
18.4.2.10 FMR40 bit
18.4.2.11 FMR41 bit
18.4.2.12 FMR46 bit
b7 b6 b5 b4
NOTES :
1.
2.
3.
4.
5.
6.
The erase-suspend function is enabled by setting the FMR40 bit to “1” (enable).
In EW0 mode, the microcomputer enters erase-suspend mode when setting the FMR41 bit to “1” by a
program. The FMR41 bit is automatically set to “1” (requests erase-suspend) when an interrupt
request of an enabled interrupt is generated in EW1 mode, and then the microcomputer enters erase-
suspend mode.
Set the FMR41 bit to “0” (erase restart) when the auto-erase operation restarts.
The FMR46 bit is set to “0” (disable reading) during auto-erase execution and set to “1” (enables
reading) in erase-suspend mode. Do not access to the flash memory while this bit is set to “0”.
0
When setting this bit to “1”, set to “1” immediately after setting it first to “0”. Do not generate an interrupt betw een
setting the bit to “0” and setting it to “1”. Enter read array mode and set this bit to “0”.
Set this bit to “1” immediately after setting this bit first to “0” w hile the FMR01 bit is set to “1”.
Do not generate an interrupt betw een setting the bit to “0” and setting it to “1”.
Set this bit by a program in a space other than the flash memory.
This bit is set to “0” by executing the clear status command.
This bit is enabled w hen the FMR01 bit is set to “1” (CPU rew rite mode). When the FMR01 bit is set to “0” and w riting
“1” to the FMSTP bit, the FMSTP bit is set to “1”. The flash memory does not enter low -pow er
consumption stat nor is reset.
When setting the FMR01 bit to “0” (CPU rew rite mode disabled), the FMR02 bit is set to “0” (disables rew rite).
Jan 19, 2006
0
b3 b2 b1 b0
FMR0 Register
Bit Symbol
(b5-b4)
Symbol
FMR00
FMR02
FMSTP
FMR06
FMR07
FMR01
FMR0
Page 203 of 254
RY/BY
CPU Rew rite Mode Select Bit
Block 0, 1 Rew rite Enable Bit
Flash Memory Stop Bit
Reserved Bit
Program Status Flag
Erase Status Flag
____
Status Flag
Address
Bit Name
01B7h
(4)
(4)
(3, 5)
(1)
(2, 6)
0 : Busy (During w riting or erasing)
1 : READY
0 : CPU rew rite mode disabled
1 : CPU rew rite mode enabled
0 : Disables rew rite
1 : Enables rew rite
0 : Enables flash memory operation
1 : Stops flash memory
Set to “0”
0 : Completed successfully
1 : Terminated by error
0 : Completed successfully
1 : Terminated by error
(Enters low -pow er consumption state
and flash memory is reset)
After Reset
00000001b
Function
18. Flash Memory Version
RW
RW
RW
RW
RW
RO
RO
RO

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