M30840SGP#U5 Renesas Electronics America, M30840SGP#U5 Datasheet - Page 360

• Manufacturer Part Number: M30840SGP#U5
• Description: IC M32C/84 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30840SGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

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3
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J
2
Figure 23.12 C0REC Register
Figure 23.11 C0TEC Register
0
C
1
23.1.9 CAN0 Transmit Error Count Register (C0TEC Register)
23.1.10 CAN0 Receive Error Count Register (C0REC Register)
9
8 /
0 .
B
0
1
4
0
G
In an error active or an error passive state, a counting value of the reception error is stored into the
C0REC register. The counter is decremented when the CAN module has received data successfully
or it is incremented when a receive error occurs.
The C0REC register is set to 127 when the C0REC register is 128 (error passive state) or more and
the CAN module has received successfully.
In a bus-off state, an indeterminate value is stored into the C0REC register. The C0REC register is
set to "00
3
J
In an error active or an error passive state, the counting value of a transmission error is stored into
the C0TEC register. The counter is decremented when the CAN module has transmitted data suc-
cessfully or is incremented when an transmit error occurs.
In a bus-off state, an indeterminate value is stored into the C0TEC register. The C0TEC register is
set to "00
6
u
o r
0 -
. l
CAN0 Transmit Error Count Register
CAN0 Receive Error Count Register
b7
b7
u
NOTES:
0
1
p
, 7
0
NOTES:
1. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after
1
(
2
M
reset and supplying the clock to the CAN module.
1. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after
0
3
16
0
16
reset and supplying the clock to the CAN module.
2
5
" when the CAN module is placed in an error active state again.
" when the CAN module is placed in an error active state again.
C
8 /
Page 337
, 4
M
3
2
C
b0
b0
8 /
f o
4
4
Counter value of transmission errors
Counter value of receive error
) T
9
5
Symbol
C0TEC
Symbol
C0REC
Address
020A
Address
020B
16
16
Function
Function
After Reset
00
After Reset
00
16
16
(1)
(1)
23. CAN Module
RW
RO
RW
RO