M30840SGP#U5 Renesas Electronics America, M30840SGP#U5 Datasheet - Page 522

• Manufacturer Part Number: M30840SGP#U5
• Description: IC M32C/84 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30840SGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev.
REVISION HISTORY
Date
Page
101
103
104
107
109
111
116
117
119
120
121
122
123
131
132
137
138
147
153
154
155
160
175
96
98
99
• Table 9.6 CLK
• 9.5.2 Wait Mode Chapter structure modified
• Table 9.7 Pin States in Wait Mode Note 1 added
• 9.5.3 Stop Mode Interrupt usable to exit stop mode added; note 1 added
• Table 9.9 Pin Status in Stop Mode Note 1 added
• Figure 9.13 Status Transition in Wait Mode and Stop Mode Figure partially
• Figure 9.14 Status Transition Note 5 modified
Interrupts
• Figure 11.1 Interrupts Note 3 added
• Figure 11.1 Interrupts Note 3 added
• 11.3.1.4 Low Voltage Detection Interrupt Note 1 added
• Figure 11.4 Interrupt Control Register (2) Note mark position changed
• Figure 11.5 RLVL Register Value after reset changed; note 4 deleted
• 11.6.4 Interrupt Response Time Description modified
• Figure 11.5 Interrupts without Interrupt Priority Levels and IPL Note1 added
• 11.6.6 Saving a Register Description modified; note1 added
• Figure 11.8 Interrupt Priority Note 1 added
• Figure 11.9 Interrupt Priority Level Select Circuit Note 1 added
Watchdog Timer
• Figure 12.1 Watchdog Timer Block Diagram Block diagram modified
• Figure 12.2 WDC Register and WDTS Register Note 3 added to the WDC
DMAC
• Figure 13.2 DM0SL to DM3SL Registers Value after reset changed
• Table 13.2 DMiSL Register (i=0 to 3) Function Note 3 modified
DMACII
• Figure 14.1 RLVL Register Value after reset changed; note 4 deleted
• 14.8 Execution Time Description modified
• Figure 14.5 Transfer Cycle The number of cycles changed
Timer
• Figure 15.1 Timer A Configuration Figure modified
• Figure 15.2 Timer B Configuration Figure modified
• Figure 15.7 TRGSR Register and TCSPR Register Added note 2 to the
• Table 15.8 Settings for the TBi
Mode Note 4 added
modified; Note 2 deleted; Note numbers changed accordingly
register
TCSPR register
modified
M32C/84 Group(M32C/84, M32C/84T) Hardware Manual
OUT
Pin in Memory Expansion Mode and Microprocessor
C-4
Description
IN
Summary
Pins (i=0 to 5) PS3 bit in the P9
4
register