DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 133

• Manufacturer Part Number: DF2265TE13V
• Description: IC H8S/2265 MCU FLASH 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2265TE13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.4
5.4.1
There are 14 external interrupts for the H8S/2268 Group: NMI, IRQ5 to IRQ3, IRQ1, IRQ0, and
WKP7 to WKP0, and 13 external interrupts for the H8S/2264 Group: NMI, IRQ4, IRQ3, IRQ1,
IRQ0, and WKP7 to WKP0. These interrupts can be used to restore this LSI from software
standby mode.
NMI Interrupt: NMI is the highest-priority interrupt, and is always accepted by the CPU
regardless of the interrupt control mode or the status of the CPU interrupt mask bits. The NMIEG
bit in SYSCR can be used to select whether an interrupt is requested at a rising edge or a falling
edge on the NMI pin.
IRQn Interrupts (H8S/2268 Group: n = 5 to 3, 1, and 0; H8S/2264 Group: n = 4, 3, 1, and 0):
IRQn interrupts are requested by an input signal at IRQn pins. IRQn interrupts have the following
features:
• Using ISCR, it is possible to select whether an interrupt is generated by a low level, falling
• Enabling or disabling of IRQn interrupt requests can be selected with IER.
• The interrupt priority level can be set with IPR. (H8S/2268 Group only)
• The status of IRQn interrupt requests is indicated in ISR. ISR flags can be cleared to 0 by
A block diagram of IRQn interrupts is shown in figure 5.3.
edge, rising edge, or both edges, at IRQn pins.
software.
IRQn input
Note: H8S/2268 Group: n = 5 to 3, 1, 0
Interrupt Sources
External Interrupts
H8S/2264 Group: n = 4, 3, 1, 0
Figure 5.3 Block Diagram of IRQn Interrupts
IRQnSCA, IRQnSCB
detection circuit
Edge/level
Clear signal
R
S
IRQnF
Rev. 5.00 Sep. 01, 2009 Page 81 of 656
Q
IRQnE
Section 5 Interrupt Controller
IRQn interrupt
request
REJ09B0071-0500