DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 33

• Manufacturer Part Number: DF2265TE13V
• Description: IC H8S/2265 MCU FLASH 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2265TE13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.4 Operation........................................................................................................................... 406
14.5 Interrupt Source ................................................................................................................ 429
14.6 Usage Notes ...................................................................................................................... 429
Section 15 A/D Converter..................................................................................443
15.1 Features ............................................................................................................................. 443
15.2 Input/Output Pins .............................................................................................................. 445
15.3 Register Descriptions ........................................................................................................ 446
15.4 Interface to Bus Master ..................................................................................................... 450
15.5 Operation........................................................................................................................... 451
15.6 Interrupt Source ................................................................................................................ 456
15.7 A/D Conversion Accuracy Definitions ............................................................................. 457
15.8 Usage Notes ...................................................................................................................... 459
Section 16 D/A Converter..................................................................................463
16.1 Features ............................................................................................................................. 463
16.2 Input/Output Pins .............................................................................................................. 464
14.3.8 DDC Switch Register (DDCSWR) ...................................................................... 405
14.4.1 I
14.4.2 Initial Setting........................................................................................................ 408
14.4.3 Master Transmit Operation .................................................................................. 408
14.4.4 Master Receive Operation.................................................................................... 412
14.4.5 Slave Receive Operation...................................................................................... 417
14.4.6 Slave Transmit Operation .................................................................................... 422
14.4.7 IRIC Setting Timing and SCL Control ................................................................ 425
14.4.8 Operation Using the DTC (H8S/2268 Group Only) ............................................ 426
14.4.9 Noise Canceler ..................................................................................................... 427
14.4.10 Initialization of Internal State .............................................................................. 427
15.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 446
15.3.2 A/D Control/Status Register (ADCSR) ............................................................... 447
15.3.3 A/D Control Register (ADCR) ............................................................................ 449
15.5.1 Single Mode......................................................................................................... 451
15.5.2 Scan Mode ........................................................................................................... 453
15.5.3 Input Sampling and A/D Conversion Time.......................................................... 454
15.5.4 External Trigger Input Timing............................................................................. 456
15.8.1 Module Stop Mode Setting .................................................................................. 459
15.8.2 Permissible Signal Source Impedance ................................................................. 459
15.8.3 Influences on Absolute Accuracy ........................................................................ 459
15.8.4 Range of Analog Power Supply and Other Pin Settings ...................................... 460
15.8.5 Notes on Board Design ........................................................................................ 460
15.8.6 Notes on Noise Countermeasures ........................................................................ 460
2
C Bus Data Format ............................................................................................ 406
Rev. 5.00 Sep. 01, 2009 Page xxxi of l
REJ09B0071-0500