DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 249

• Manufacturer Part Number: DF2265TE13V
• Description: IC H8S/2265 MCU FLASH 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2265TE13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 10.8 MD0 to MD3
Legend:
X: Don’t care
Notes: 1. MD3 is a reserved bit. In a write, it should always be written with 0.
10.3.3
The TIOR registers control the TGR registers. The H8S/2268 Group TPU has four TIOR registers
and the H8S/2264 Group TPU has two TIOR registers, two for channel 0, and one each for
channels 1 and 2.
Care is required as TIOR is affected by the TMDR setting. The initial output specified by TIOR is
valid when the counter is stopped (the CST bit in TSTR is cleared to 0). Note also that, in PWM
mode 2, the output at the point at which the counter is cleared to 0 is specified.
In the H8S/2268 Group, when TGRC or TGRD is designated for buffer operation, this setting is
invalid and the register operates as a buffer register.
Bit 3
MD3 *
0
1
1
2. Phase counting mode cannot be set in the H8S/2264 Group or for channels 0 in the
Timer I/O Control Register (TIOR)
Bit 2
MD2 *
0
1
X
H8S/2268 Group. In this case, 0 should always be written to MD2.
2
Bit 1
MD1
0
1
0
1
X
Bit 0
MD0
0
1
0
1
0
1
0
1
X
Description
Normal operation
Reserved
PWM mode 1
PWM mode 2
Phase counting mode 1
Phase counting mode 2
Phase counting mode 3
Phase counting mode 4
⎯
Rev. 5.00 Sep. 01, 2009 Page 197 of 656
Section 10 16-Bit Timer Pulse Unit (TPU)
REJ09B0071-0500