DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 154
DF2265TE13V
Manufacturer Part Number
DF2265TE13V
Description
IC H8S/2265 MCU FLASH 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Specifications of DF2265TE13V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2265TE13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 5 Interrupt Controller
5.6.4
Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.
With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer
is not accepted until the move is completed.
With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt
exception handling starts at a break in the transfer cycle. The PC value saved on the stack in this
case is the address of the next instruction.
Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the
following coding should be used.
5.6.5
When operating by clock input, acceptance of input to an IRQ is synchronized with the clock. In
software standby mode and watch mode, the input is accepted asynchronously. For details on the
input conditions, see section 25.2.3, 25.3.3, Control Signal Timing.
5.6.6
The NMI interrupt is part of the exception processing performed cooperatively by the LSI’s
internal interrupt controller and the CPU when the system is operating normally under the
specified electrical conditions. No operations, including NMI interrupts, are guaranteed when
operation is not normal (runaway status) due to software problems or abnormal input to the LSI’s
pins. In such cases, the LSI may be restored to the normal program execution state by applying an
external reset.
Rev. 5.00 Sep. 01, 2009 Page 102 of 656
REJ09B0071-0500
L1:
Interrupts during Execution of EEPMOV Instruction
IRQ Interrupt
NMI Interrupt Usage Notes
EEPMOV.W
MOV.W
BNE
R4,R4
L1
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