DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 264

IC H8S/2265 MCU FLASH 100TQFP

DF2265TE13V

Manufacturer Part Number
DF2265TE13V
Description
IC H8S/2265 MCU FLASH 100TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of DF2265TE13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2265TE13V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 16-Bit Timer Pulse Unit (TPU)
Notes: 1. Only 0 can be written to this bit to clear the flag.
Rev. 5.00 Sep. 01, 2009 Page 212 of 656
REJ09B0071-0500
1
Bit
0
2. Supported only by the H8S/2268 Group.
Bit Name
TGFB
TGFA
Initial
value
0
0
R/W
R/(W) *
R/(W) *
1
1
Description
Input Capture/Output Compare Flag B
Status flag that indicates the occurrence of TGRB input
capture or compare match. Only 0 can be written, for flag
clearing.
[Setting conditions]
[Clearing conditions]
Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match. Only 0 can be written, for flag
clearing.
[Setting conditions]
[Clearing conditions]
When TCNT = TGRB and TGRB is functioning as
output compare register
When TCNT value is transferred to TGRB by input
capture signal and TGRB is functioning as input
capture register
When DTC *
DISEL bit of MRB in DTC *
counter other than 0
When 0 is written to TGFB after reading TGFB = 1
When TCNT = TGRA and TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal and TGRA is functioning as input
capture register
When DTC *
DISEL bit of MRB in DTC *
counter other than 0
When 0 is written to TGFA after reading TGFA = 1
2
2
is activated by TGIB interrupt and the
is activated by TGIA interrupt and the
2
2
is 0 with the transfer
is 0 with the transfer

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