DF2265TE13V Renesas Electronics America, DF2265TE13V Datasheet - Page 448

• Manufacturer Part Number: DF2265TE13V
• Description: IC H8S/2265 MCU FLASH 100TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2265TE13V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 14 I
Rev. 5.00 Sep. 01, 2009 Page 396 of 656
REJ09B0071-0500
3
Bit
Bit Name
ACKE
2
C Bus Interface (IIC) (Supported as an Option by H8S/2264 Group)
Initial
Value
0
R/W
R/W
Description
Acknowledge Bit Judgement Selection
0: The value of the acknowledge bit is ignored, and
1: If the acknowledge bit is 1, continuous transfer is
In the H8S/2268 Group, the DTC * can be used to
perform continuous transfer. The DTC * is activated when
the IRTR interrupt flag is set to 1 (IRTR us one of two
interrupt flags, the other being IRIC). When the ACKE bit
is 0, the TDRE, IRIC, and IRTR flags are set on
completion of data transmission, regardless of the
acknowledge bit. When the ACKE bit is 1, the TDRE,
IRIC, and IRTR flags are set on completion of data
transmission when the acknowledge bit is 0, and the IRIC
flag alone is set on completion of data transmission when
the acknowledge bit is 1.
When the DTC * is activated, the TDRE, IRIC, and IRTR
flags are cleared to 0 after the specified number of data
transfers have been executed. Consequently, interrupts
are not generated during continuos data transfer, but if
data transmission is completed with a 1 acknowledge bit
when the ACKE bit is set to 1, the DTC * is not activated
and an interrupt is generated, if enabled.
Depending on the receiving device, the acknowledge bit
may be significant, in indicating completion of processing
of the received data, for instance, or may be fixed at 1
and have no significance.
Note: * Supported only by the H8S/2268 Group.
continuous transfer is performed. The value of the
received acknowledge bit is not indicated by the ACKB
bit, which is always 0.
interrupted.