UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 282

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UPD70F3735GK-GAK-AX

Manufacturer Part Number
UPD70F3735GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GK-GAK-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(3) TMQ0 I/O control register 0 (TQ0IOC0)
The TQ0IOC0 register is an 8-bit register that controls the timer output (TOQ00 to TOQ03 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TQ0IOC0
After reset: 00H
Note The output level of the timer output pin (TOQ0m) specified by the
Cautions 1. Rewrite
Remark
TQ0OEm
TQ0OLm
TQ0OL3
0
1
0
1
7
TQ0OLm bit is shown below.
• When TQ0OLm bit = 0
TOQ0m output pin
Timer output disabled
• When TQ0OLm bit = 0: Low level is output from the TOQ0m pin
• When TQ0OLm bit = 1: High level is output from the TOQ0m pin
TQ0OE3 TQ0OL2 TQ0OE2 TQ0OL1 TQ0OE1 TQ0OL0 TQ0OE0
Timer output enabled (A square wave is output from the TOQ0m pin).
m = 0 to 3
R/W
TOQ0m pin starts output at high level
TOQ0m pin starts output at low level
2. Even if the TQ0OLm bit is manipulated when the TQ0CE and
<6>
TQ0CTL0.TQ0CE bit = 0. (The same value can be written
when the TQ0CE bit = 1.)
performed, clear the TQ0CE bit to 0 and then set the bits
again.
TQ0OEm bits are 0, the TOQ0m pin output level varies.
16-bit counter
TQ0CE bit
Address: FFFFF542H
TOQ0m pin output level setting (m = 0 to 3)
5
the
TOQ0m pin output setting (m = 0 to 3)
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0OLm
<4>
3
and
• When TQ0OLm bit = 1
TOQ0m output pin
If rewriting was mistakenly
TQ0OEm
<2>
16-bit counter
TQ0CE bit
Note
1
bits
when
<0>
the
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