UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 367

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UPD70F3735GK-GAK-AX

Manufacturer Part Number
UPD70F3735GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GK-GAK-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
8.5.7
set to 1. Each time the valid edge input to the TIQ0m pin has been detected, the count value of the 16-bit counter is stored
in the TQ0CCRm register, and the 16-bit counter is cleared to 0000H.
signal (INTTQ0CCm) occurs.
TQ0IOC1 register for the unused pins.
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
In the pulse width measurement mode, 16-bit timer/event counter Q starts counting when the TQ0CTL0.TQ0CE bit is
The interval of the valid edge can be measured by reading the TQ0CCRm register after a capture interrupt request
Select either of the TIQ00 to TIQ03 pins as the capture trigger input pin. Specify “No edge detected” by using the
Remark
Pulse width measurement mode (TQ0MD2 to TQ0MD0 bits = 110)
trigger input)
trigger input)
trigger input)
trigger input)
TIQ00 pin
TIQ01 pin
TIQ02 pin
TIQ03 pin
(capture
(capture
(capture
(capture
m = 0 to 3
k = 1 to 3
Figure 8-34. Configuration in Pulse Width Measurement Mode
detector
detector
detector
detector
Edge
Edge
Edge
Edge
selection
Count
TQ0CE
clock
bit
TQ0CCR0
(capture)
register
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0CCR1
(capture)
register
TQ0CCR2
(capture)
register
TQ0CCR3
counter
(capture)
16-bit
register
Clear
INTTQ0OV signal
INTTQ0CC0 signal
INTTQ0CC1 signal
INTTQ0CC2 signal
INTTQ0CC3 signal
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