UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 287

• Manufacturer Part Number: UPD70F3735GK-GAK-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GK-GAK-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(a) Function as compare register
(b) Function as capture register
The following table shows the functions of the capture/compare register in each mode, and how to write data to the
compare register.
Table 8-2. Function of Capture/Compare Register in Each Mode and How to Write Compare Register
Interval timer
External event counter
External trigger pulse output
One-shot pulse output
PWM output
Free-running timer
Pulse width measurement
The TQ0CCR0 register can be rewritten even when the TQ0CTL0.TQ0CE bit = 1.
The set value of the TQ0CCR0 register is transferred to the CCR0 buffer register. When the value of the 16-bit
counter matches the value of the CCR0 buffer register, a compare match interrupt request signal (INTTQ0CC0)
is generated. If TOQ00 pin output is enabled at this time, the output of the TOQ00 pin is inverted.
When the TQ0CCR0 register is used as a cycle register in the interval timer mode, external event count mode,
external trigger pulse output mode, one-shot pulse output mode, or PWM output mode, the value of the 16-bit
counter is cleared (0000H) if its count value matches the value of the CCR0 buffer register.
When the TQ0CCR0 register is used as a capture register in the free-running timer mode, the count value of
the 16-bit counter is stored in the TQ0CCR0 register if the valid edge of the capture trigger input pin (TIQ00
pin) is detected. In the pulse-width measurement mode, the count value of the 16-bit counter is stored in the
TQ0CCR0 register and the 16-bit counter is cleared (0000H) if the valid edge of the capture trigger input pin
(TIQ00 pin) is detected.
Even if the capture operation and reading the TQ0CCR0 register conflict, the correct value of the TQ0CCR0
register can be read.
Operation Mode
Compare register
Compare register
Compare register
Compare register
Capture/compare register
Capture register
Compare register
Capture/Compare Register
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Anytime write
Anytime write
Batch write
Anytime write
Batch write
Anytime write
How to Write Compare Register
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