PIC17C756-16/SP Microchip Technology, PIC17C756-16/SP Datasheet - Page 143

• Manufacturer Part Number: PIC17C756-16/SP
• Description: MICRO CTRL 16K MEMORY OTP 64SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-16/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Other names: PIC17C756-16/P

9.
10. The module generates an interrupt at the end of
11. The user generates a STOP condition by setting
FIGURE 15-21: BAUD RATE GENERATOR BLOCK DIAGRAM
FIGURE 15-22: BAUD RATE GENERATOR TIMING WITH CLOCK ARBITRATION
1997 Microchip Technology Inc.
The SSP Module shifts in the ACK bit from the
slave device, and writes its value into the
SSPCON2 register ( SSPCON2<6>).
the ninth clock cycle by setting SSPIF.
the STOP enable bit PEN in SSPCON2.
SSPM3:SSPM0
Note: There are two baud rate overflows per clock period. Clock period may be of variable time due to clock arbitration.
SDA
SCL
BRG
value
BRG
reload
SCL
00h
SSPM3:SSPM0
BRG counts
down
03h
SCL is sampled high, reload takes
place, and BRG starts its count.
Control
Reload
DX
SCL deasserted but slave holds
SCL low (clock arbitration)
CLKOUT
02h
BRG counts
down
Reload
01h
BRG Down Counter
Preliminary
SSPADD<6:0>
BRG counts
down
00h
DX-1
15.2.6
In I
located in the lower 7 bits of the SSPADD register
(Figure 15-21). When the BRG is loaded with this
value, the BRG counts down to 0 and stops until
another reload has taken place. In I
the BRG is not reloaded automatically. If Clock Arbi-
tration is taking place for instance, the BRG will be
reloaded when the SCL pin is sampled high
(Figure 15-22).
XX
2
C master mode, the reload value for the BRG is
SCL allowed to transition high
BAUD RATE GENERATOR
03h
Fosc/4
02h
01h
00h
DS30264A-page 143
2
C master mode,